13 lines
458 B
Markdown
13 lines
458 B
Markdown
# Quad-issue Superscalar RISCV
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- Up to four instructions can be simultaneously issued and retired.
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- ALU cores are combinational.
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- Core can handle branches which occur in any of the four pipelines.
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- Can also handle register dependancies in the pipeline.
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** Very incomplete! Once it was able to issue multiple instructions and handle branches and register dependancies I got bored and moved on! :)
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For questions email me at www.MicroCoreLabs.com
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