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KS10 microcode.

Browse Source 
Plus assorted KS10-related documents.
This commit is contained in:
Lars Brinkhoff
2018-06-11 10:13:54 +02:00
parent 6d577568a2
commit 52ef5130b7
16 changed files with 10521 additions and 0 deletions
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6
build/misc.tcl
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@@ -827,6 +827,12 @@ expect ":KILL"
# Write the RAM file to the front end filesystem:
# :klfedr write ucode;u1 ram
# KS10 microcode.
# It doesn't seem to work very well when purified.
respond "*" ":kshack;micro kshack;mcr 262=kshack;its,ks10,simple,flt,extend,inout,itspag,pagef\r"
expect ":KILL"
respond "*" ":copy kshack; mcr ram, .; ram ram\r"
# XXFILE
respond "*" ":midas sysbin;xxfile bin_sysen1;xxfile\r"
expect ":KILL"

14
doc/kshack/-read-.-this- Executable file
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This directory contains KS10 specific files for ITS. It contains:
The microcode assembler, microcode source files, etc.
KSDEFS and other KS10-specific documentation and definition files.
The new salvager NSALV.
KSFEDR, the 8080 front-end filesystem manipulation program.
MTBOOT, the KS10 boot tape writing program.
The MINI36 server, used by NSALV to retrieve files over Chaosnet.
Etc.
The KSHACK directory on MC no longer contains the canonical versions of
these files. The KSHACK directory on AI is now the official KS10 hacking
directory. -Alan 12/30/85

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doc/kshack/1proc.bugs Executable file
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@@ -0,0 +1,2 @@
Some floating-point instructions clear all bits in FLG,
they will have to be fixed to only clear some LH bits.

182
doc/kshack/ainote.8 Executable file
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-*- Text -*- This is the file AI:KSHACK;AINOTE >
WHAT TO DO IF AI CRASHES
*******************************************************************************
* Before following these directions, please try to find a system hacker to *
* take a look at the corpse first. *
* *
* If you do -anything- about a crashed ITS, leave an explanation in the log *
* book next to the system console. Include the date and time, your name, *
* what the problem was, what you did, and anything else relevant. And please *
* make it legible; three lines of random scrawls can't help the hackers fix *
* the problem. *
*******************************************************************************
THE SIMPLEST CASE
In the most common sort of crash, AI will type a bug message and go to Exec
DDT. For example:
PI LEVEL 7 BUGHALT. FIND A WIZARD OR CONSIDER TAKING A CRASH DUMP.
THE SYSTEM HAS CRASHED AND CANNOT BE REVIVED WITHOUT EXPERT ATTENTION.
IF YOU CAN'T FIND HELP, RELOAD THE SYSTEM.
YOU ARE NOW IN DDT.
BUGPC/ CAIA PCLSR+3 $Q-1/ PUSHJ P,BUGNIL
If the message says that the bug is "proceedable", you can try typing:
$P
to revive the system. If this works, be glad you don't have to read the rest
of this notice; however, you should still leave a note in the log book.
LESS THAN SIMPLE
If the system cannot be revived, it must be reloaded. To reload, you must get
to DSKDMP. Type:
$U
to leave Exec DDT and start DSKDMP. When DSKDMP starts up it announces itself
by saying:
DSKDMP
If DSKDMP has something to complain about, it will type a error message; its
error messages are explained on the summary of DSKDMP commands taped to AI. If
you don't understand (or like) what DSKDMP is telling you, stop; let someone
who does understand check it out.
CRASH DUMPS
Before reloading, you may want to take a crash dump. Crash dumps are
recommended if anything unusual was happening before the system crashed, or if
the remains look funny. To take a crash dump, get into DSKDMP and type:
D$CRASH;<fn1> <fn2><cr>
where <fn1> <fn2> is somehow descriptive of the problem; AI will linefeed when
the crash has been dumped. You can list the CRASH directory by typing:
U$CRASH;
to see what filenames are already used. If you take a crash dump, send mail to
Bug-ITS giving the filename you used.
RELOADING ITS
Look at AI's "Very Small Bulletin Board" envelope on the front of the system
console. The punch card in front will list which version of ITS is supposed to
be running. If, for instance, it says "NITS", then to reload AI, type:
.;NITS<cr>
This will cause DSKDMP to find the file DSK:.;@ NITS, load it into core, and
start it in Exec DDT -- thus, you will be talking to Exec DDT again, which will
linefeed to indicate it's ready for you.
Now check for any special instructions someone might have left about patching
ITS before starting it. Typically, a patch will appear as a few cryptic
commands scrawled on a scrap of paper stuffed into the VSBB in front on the
punch cards, which must be typed to Exec DDT before you proceed further. If
you find such instructions, but can't figure out what they mean, stop now.
To start ITS, type:
$G
to Exec DDT. ITS starts by running the Salvager over the filesystem, which
causes the disk to make noise -- don't worry, that's supposed to happen -- and
prints a series of messages to indicate its progress. If the Salvager finds
anything terribly wrong with the filesystem, it will refuse to let you bring
the system back up. If this happens, give up and find a hacker.
Next, ITS pokes around to see if there are any surprising holes in its memory.
If it finds any, it will ask if they are OK. If there is a note in the VSBB
predicting the holes exactly, answer affirmatively; otherwise it is time to
find a system hacker.
Now ITS checks whether it knows the time. If it doesn't, it tries to find the
current time from other machines on the local network. This may not work; if
it doesn't, AI will print an attention-getting message (including feeps) as it
comes up. In this case, you must log in and run the PDSET program.
RUNNING PDSET
If ITS tells you to run PDSET, you might as well does this from the system
console. So type:

and after AI greets you, type:
:PDSET<cr>
to run the PDSET program. PDSET starts by warning you that what it does is
potentially dangerous. To set the date and time type:
yymmddD
hhmmssT
!.
where "yymmdd" is the date ("850520" for May 20, 1985) and "hhmmss" is the time
in 24-hour time ("145900" for 2:59 PM). At the instant you type the ".", PDSET
will set the time to what you specified.
To leave PDSET type:
Q
and then log out:
$$U
IF AI HALTS
If the processor halts, the 8080 front-end will print a halt code and a PC.
These will look something like:
%HLTD/000001 PC/704000,,071101
Write these numbers in the log book. Also, if you take a crash dump, mention
these numbers in the mail you send to Bug-ITS.
You should now be talking to the 8080 front-end. To check this, type a
linefeed or two; you should see the prompt:
KS10>
Now type:
ST 777700<cr>
and the 8080 will try to start DSKDMP. If this works, DSKDMP will announce
itself, and you should go back to the middle of "Less Than Simple" and proceed
from there.
If DSKDMP does not start up, cold boot the machine.
COLD BOOTING
Push the white "BOOT" switch on the front of AI. This should initialize
everything, and load and start DSKDMP. DSKDMP will announce itself by typing:
DSKDMP
If nothing happens, make sure that some loser hasn't set the white "LOCK"
switch, also be sure that the "WRITE PROTECT" switch on the disk isn't set.
Now go back to "Reloading ITS" and proceed from there.
ITS IS CLEARLY BROKEN, BUT IT'S STILL RUNNING
Are you sure? Make sure it is really the case that nobody is getting any work
done. Check people on both network terminals and hardwired lines. If you are
certain, then type:

to get the attention of the 8080 front-end. It should prompt you with:
KS10>
(if it doesn't, make sure the white "LOCK" switch hasn't accidently been set).
Type:
SH<cr>
to make the 8080 ask ITS to stop and go to Exec DDT. If this works, AI will
print a PI LEVEL 7 BUG message; go back to "Less Than Simple" and proceed from
there.
If ITS ignores the 8080's request, type "" again and this time follow it
with:
HA<cr>
This should force the processor to halt, so go back to "If AI Halts" and
proceed from there. If this does not work, cold boot the machine.
CALLING DEC
If you determine that the machine needs to be serviced by DEC, call them at
895-5711. Tell them we have "2020 system number 84019009N" and describe the
problem. If they claim they can't find the system in their records, be
insistent; the field service people can find the machine even if the phone
answering people can't. They will ask for the name and phone number of someone
to contact; it doesn't matter whose you give them -- the field service people
know MIT well enough that they don't need those.
BRINGING AI DOWN
You should only bring AI down with good reason, e.g. the machine room is over
80, or it's time for PM. First, log in:
<your uname here>$U
(for instance, "DEC$U" if you're here to run PM.) Then run
:LOCK
It will prompt
_
type
nDOWN
where "n" is an integer not less than five; this will make AI bring itself down
in "n" minutes (LOCK sees numbers in octal only). This interval must be at
least five minutes to give people a chance to clean up. LOCK will ask you for
a message explaining why you're bringing AI down; type in a short explanation
and include your UNAME (so the users know who to blame) and end with

Then
Q
to get out of LOCK and
$$U
to log out. Then just wait.

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doc/kshack/consol.24 Executable file
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-*- Text -*- This is the file AI:KSHACK;CONSOL >
Useful Console Commands
Talking to the 8080:
 Start talking to the 8080
 Stops whatever the 8080 is doing
 Stop talking to the 8080
Multiple commands can be given on a command line separated by commas. If
the RP command is the last command in the line, then the line will be
repeated. It stops when you type any character. An argument to RP causes
it to repeat the command roughly that many times. Useful are: "PM,RP",
"SI,RP", "EN,RP".
Booting the machine:
BT BooT
Resets the machine and boots from disk.
Normally this loads and starts DSKDMP.
MT MagTape boot
Resets the machine and boots from magtape.
DS Disk Select
Selects which disk drive to boot from.
MS Magtape Select
Selects which tape drive to boot from.
Debugging PDP-10 code:
ST pc STart
DDT starts at 774000.
DSKDMP starts at 777700.
SH SHutdown (Stop! Hold!)
Like raising switch 0 on a machine that has one.
HA HAlt
CO COntinue
SI Single Instruction
LA addr Load Address
DM data Deposit Memory
DN data Deposit Next
EM [addr] Examine Memory
EN Examine Next
EX inst EXecute instruction
ZM Zero Memory
This is VERY slow. It starts with low addresses, so ZM
followed by  is good enough to clear most memory that
you care about.
Debugging microcode:
SM [upc] Start Microcode
0 (the default) is the normal starting address. 1 just
writes a halt status block.
MR Master Reset
Resets everything (whatever that is).
CH Clock Halt
Stops the microcode in its tracks.
CS Clock Start
Start the microcode up again.
CP [steps] Clock Pulse
Single steps the microcode one or many steps.
EJ Examine Jumps
Prints current upc and how the next upc is being computed.
PM Pulse Machine
Like "CP,EJ".
TR upc TRace
Like "PM,RP" except it stops when the current upc gets to
the specified value. Also uses twice as much paper.
TE [state] Timer Enable
"TE 0" turns the timer off. Makes it possible to single
step the microcode with paging enabled without looping
taking timer interrupts. "TE 1" turns the timer on. Just
"TE" tells you what its state is.
CE [state] Cache Enable
Turns the cache on and off.
TP [state] Traps & Paging
Turns traps and paging on and off.
Halt Status Block:
[ Note that the DEC microcode wants to write the halt status block
starting at 376000. ]
500: MAG 506: BRX 514: PI
501: PC 507: ONE 515: XWD1
502: HR 510: EBR 516: T0
503: AR 511: UBR 517: T1
504: ARX 512: MASK 520: VMA
505: BR 513: FLG
It does -not- work to start the machine and read the halt status block
using DDT, you have to read it using the 8080.
Halt Codes:
0: Power Up 102: Bad Interrupt Table Pointer
1: Halt Instruction 1000: Bad BWRITE Function
2: Halted by 8080 1004: Bad NICOND Dispatch
100: I/O Page Fail 1005: Failed Multiply Self-test
101: Bad Interrupt Instruction 777777: Halted after "SM 1" command

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doc/kshack/dec124.doc Executable file
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BIN
doc/kshack/ks-cha.txt Executable file
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534
src/kshack/dcode.5 Executable file
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;-*-Fundamental-*- Contents of KS10 Dispatch Memory
000: I, J/UUO
001: I, SJCL, J/L-CMS
I, SJCE, J/L-CMS
I, SJCLE, J/L-CMS
I, B/2, J/L-EDIT
I, SJCGE, J/L-CMS
I, SJCN, J/L-CMS
I, SJCG, J/L-CMS
010: I, B/1, J/L-DBIN ;CVTDBO
I, B/4, J/L-DBIN ;CVTDBT
I, B/1, J/L-BDEC ;CVTBDO
I, B/0, J/L-BDEC ;CVTBDT
014: I, B/1, J/L-MVS ;MOVSO
I, B/0, J/L-MVS ;MOVST
I, B/2, J/L-MVS ;MOVSLJ
I, B/3, J/L-MVS ;MOVSRJ
020: I, J/L-XBLT
I, J/L-SPARE-A
I, J/L-SPARE-B
I, B/0, J/L-SPARE-C
I, B/1, J/L-SPARE-C
I, B/2, J/L-SPARE-C
I, B/4, J/L-SPARE-C
I, B/10, J/L-SPARE-C
030: I, B/0, J/LUUO
I, B/1, J/LUUO
I, B/2, J/LUUO
I, B/3, J/LUUO
I, B/4, J/LUUO
I, B/5, J/LUUO
I, B/6, J/LUUO
I, B/7, J/LUUO
040: I, J/MUUO ;CALL ;.IOT
I, J/MUUO ;INIT ;.OPEN
I, J/MUUO ;.OPER
I, J/MUUO ;.CALL
I, J/MUUO ;.USET
I, J/MUUO ;.BREAK
I, J/MUUO ;.STATUS
I, J/MUUO ;CALLI ;.ACCESS
I, J/MUUO ;OPEN
I, J/MUUO ;TTCALL
I, J/MUUO
I, J/MUUO
I, J/MUUO
I, J/MUUO ;RENAME
I, J/MUUO ;IN
I, J/MUUO ;OUT
I, J/MUUO ;SETSTS
I, J/MUUO ;STATO
I, J/MUUO ;GETSTS
I, J/MUUO ;STATZ
I, J/MUUO ;INBUF
I, J/MUUO ;OUTBUF
I, J/MUUO ;INPUT
I, J/MUUO ;OUTPUT
I, J/MUUO ;CLOSE
I, J/MUUO ;RELEAS
I, J/MUUO ;MTAPE
I, J/MUUO ;UGETF
I, J/MUUO ;USETI
I, J/MUUO ;USETO
I, J/MUUO ;LOOKUP
I, J/MUUO ;ENTER
100: I, J/UUO ;UJEN
I, J/UUO101
.IF/ITS
102: I, J/XCTRI
I, J/XCTR
.IFNOT/ITS
102: I, J/UUO102
I, J/UUO103
.ENDIF/ITS
104: I, J/JSYS ;JSYS
105: I-PF, B/0, J/ADJSP
106: I, J/UUO106
I, J/UUO107
110: DBL FL-R, J/DFAD
111: DBL FL-R, J/DFSB
112: DBL FL-R, DAC, J/DFMP
113: DBL FL-R, DAC, J/DFDV
114: DBL R, DAC, J/DADD
DBL R, DAC, J/DSUB
116: DBL R, DAC, J/DMUL
117: DBL R, DAC, J/DDIV
120: DBL R, DAC, J/DAC ;DMOVE
DBL R, AC, J/DMOVN ;DMOVN
122: FL-R, FL-AC, J/FIX ;FIX
123: I, READ/1, J/EXTEND ;EXTEND
124: DBL AC, J/DMOVN1 ;DMOVEM
W, J/DMOVNM ;DMOVNM
126: FL-R, FL-AC, ROUND, J/FIX ;FIXR
127: R, FL-AC, ROUND, J/FLTR ;FLTR
130: I, B/0, J/FP-LONG ;UFA
I, B/1, J/FP-LONG ;DFN
132: I, FL-AC, J/FSC
133: R, AC, J/IBP ;OR ADJBP
134: R, W TEST, J/ILDB ;CAN'T USE RPW BECAUSE OF FPD
R, J/LDB
R, W TEST, J/IDPB
R, J/DPB
140: FL-R, FL-AC, J/FAD
141: I, B/2, J/FP-LONG ;FADL
142: FL-RW, FL-MEM, J/FAD
FL-RW, FL-BOTH, J/FAD
FL-R, FL-AC, ROUND, J/FAD
FL-I, FL-AC, ROUND, J/FAD
FL-RW, FL-MEM, ROUND, J/FAD
FL-RW, FL-BOTH, ROUND, J/FAD
150: FL-R, FL-AC, J/FSB
151: I, B/3, J/FP-LONG ;FSBL
152: FL-RW, FL-MEM, J/FSB
FL-RW, FL-BOTH, J/FSB
FL-R, FL-AC, ROUND, J/FSB
FL-I, FL-AC, ROUND, J/FSB
FL-RW, FL-MEM, ROUND, J/FSB
FL-RW, FL-BOTH, ROUND, J/FSB
160: FL-R, FL-AC, J/FMP
161: I, B/4, J/FP-LONG ;FMPL
162: FL-RW, FL-MEM, J/FMP
FL-RW, FL-BOTH, J/FMP
FL-R, FL-AC, ROUND, J/FMP
FL-I, FL-AC, ROUND, J/FMP
FL-RW, FL-MEM, ROUND, J/FMP
FL-RW, FL-BOTH, ROUND, J/FMP
170: FL-R, FL-AC, J/FDV
171: I, B/5, J/FP-LONG ;FDVL
172: FL-RW, FL-MEM, J/FDV
FL-RW, FL-BOTH, J/FDV
FL-R, FL-AC, ROUND, J/FDV
FL-I, FL-AC, ROUND, J/FDV
FL-RW, FL-MEM, ROUND, J/FDV
FL-RW, FL-BOTH, ROUND, J/FDV
200: R-PF, AC, J/STAC ;MOVE
I-PF, AC, J/STAC ;MOVEI
W, M, J/MOVE ;MOVEM
RW, S, J/STSELF ;MOVES
204: R-PF, AC, J/MOVS ;MOVS
I-PF, AC, J/MOVS ;MOVSI
W, M, J/MOVS ;MOVSM
RW, S, J/MOVS ;MOVSS
210: R-PF, AC, J/MOVN ;MOVN
I-PF, AC, J/MOVN ;MOVNI
W, M, J/MOVN ;MOVNM
RW, S, J/MOVN ;MOVNS
214: R-PF, AC, J/MOVM ;MOVM
I-PF, AC, J/STAC ;MOVMI
W, M, J/MOVM ;MOVMM
RW, S, J/MOVM ;MOVNS
220: R-PF, AC, J/IMUL
I-PF, AC, J/IMUL
RW, M, J/IMUL
RW, B, J/IMUL
224: R-PF, DAC, J/MUL
I-PF, DAC, J/MUL
RW, M, J/MUL
RW, DBL B, J/MUL
230: R-PF, DAC, J/IDIV
I-PF, DAC, J/IDIV
RW, M, J/IDIV
RW, DBL B, J/IDIV
234: R-PF, DAC, J/DIV
I-PF, DAC, J/DIV
RW, M, J/DIV
RW, DBL B, J/DIV
240: SH, J/ASH
SH, J/ROT
SH, J/LSH
I, J/JFFO
I-PF, J/ASHC
245: SHC, J/ROTC
SHC, J/LSHC
.IF/CIRC
I, J/CIRC ;That's whats in the DROM...
.IFNOT/CIRC
247: I, J/UUO247 ;RESERVED
.ENDIF/CIRC
250: R, W TEST, AC, J/EXCH
251: I, J/BLT
252: I, SJCGE, J/AOBJ
I, SJCL, J/AOBJ
254: I, VMA/0, AC DISP, J/JRST
I, J/JFCL
256: R, J/XCT ;OPERAND FETCHED AS DATA
.IF/ITS
257: IOT, AC, J/UUO257
.IFNOT/ITS
257: IOT, AC, J/MAP
.ENDIF/ITS
260: I, B/0, J/PUSHJ
IR, B/2, J/PUSH
I, B/2, J/POP
I, J/POPJ
264: I, J/JSR
I, J/JSP
I, J/JSA
I, J/JRA
270: R-PF, AC, J/ADD
I-PF, AC, J/ADD
RW, M, J/ADD
RW, B, J/ADD
274: R-PF, AC, J/SUB
I-PF, AC, J/SUB
RW, M, J/SUB
RW, B, J/SUB
300: I, SJC-, J/DONE ;CAI
I, SJCL, J/CAIM
I, SJCE, J/CAIM
I, SJCLE, J/CAIM
I, SJCA, J/CAIM
I, SJCGE, J/CAIM
I, SJCN, J/CAIM
I, SJCG, J/CAIM
310: R, SJC-, J/CAIM ;CAM
R, SJCL, J/CAIM
R, SJCE, J/CAIM
R, SJCLE, J/CAIM
R, SJCA, J/CAIM
R, SJCGE, J/CAIM
R, SJCN, J/CAIM
R, SJCG, J/CAIM
320: I, SJC-, J/DONE
I, SJCL, J/JUMP
I, SJCE, J/JUMP
I, SJCLE, J/JUMP
I, SJCA, J/JRST
I, SJCGE, J/JUMP
I, SJCN, J/JUMP
I, SJCG, J/JUMP
330: R, SJC-, J/SKIPS ;NOT A NOP IF AC .NE. 0
R, SJCL, J/SKIPS
R, SJCE, J/SKIPS
R, SJCLE, J/SKIPS
R, SJCA, J/SKIPS
R, SJCGE, J/SKIPS
R, SJCN, J/SKIPS
R, SJCG, J/SKIPS
340: I-PF, SJC-, J/AOJ
I, SJCL, J/AOJ
I, SJCE, J/AOJ
I, SJCLE, J/AOJ
I, SJCA, J/AOJ
I, SJCGE, J/AOJ
I, SJCN, J/AOJ
I, SJCG, J/AOJ
350: RW, SJC-, J/AOS
RW, SJCL, J/AOS
RW, SJCE, J/AOS
RW, SJCLE, J/AOS
RW, SJCA, J/AOS
RW, SJCGE, J/AOS
RW, SJCN, J/AOS
RW, SJCG, J/AOS
360: I-PF, SJC-, J/SOJ
I, SJCL, J/SOJ
I, SJCE, J/SOJ
I, SJCLE, J/SOJ
I, SJCA, J/SOJ
I, SJCGE, J/SOJ
I, SJCN, J/SOJ
I, SJCG, J/SOJ
370: RW, SJC-, J/SOS
RW, SJCL, J/SOS
RW, SJCE, J/SOS
RW, SJCLE, J/SOS
RW, SJCA, J/SOS
RW, SJCGE, J/SOS
RW, SJCN, J/SOS
RW, SJCG, J/SOS
400: I-PF, AC, J/SETZ
I-PF, AC, J/SETZ
IW, M, J/SETZ
IW, B, J/SETZ
404: R-PF, AC, J/AND
I-PF, AC, J/AND
RW, M, J/AND
RW, B, J/AND
410: R-PF, AC, J/ANDCA
I-PF, AC, J/ANDCA
RW, M, J/ANDCA
RW, B, J/ANDCA
414: R-PF, AC, J/MOVE ;SETM = MOVE
I-PF, AC, J/MOVE
RW, M, J/MOVE ;SETMM = NOP THAT WRITES MEMORY
RW, B, J/MOVE ;SETMB = MOVE THAT WRITES MEMORY
420: R-PF, AC, J/ANDCM
I-PF, AC, J/ANDCM
RW, M, J/ANDCM
RW, B, J/ANDCM
424: R, J/DONE
I, J/DONE
W, M, J/MOVE ;SETAM = MOVEM
W, M, J/MOVE ;SETAB, TOO
430: R-PF, AC, J/XOR
I-PF, AC, J/XOR
RW, M, J/XOR
RW, B, J/XOR
434: R-PF, AC, J/IOR
I-PF, AC, J/IOR
RW, M, J/IOR
RW, B, J/IOR
440: R-PF, AC, J/ANDCB
I-PF, AC, J/ANDCB
RW, M, J/ANDCB
RW, B, J/ANDCB
444: R-PF, AC, J/EQV
I-PF, AC, J/EQV
RW, M, J/EQV
RW, B, J/EQV
450: I-PF, AC, J/SETCA
I-PF, AC, J/SETCA
IW, M, J/SETCA
IW, B, J/SETCA
454: R-PF, AC, J/ORCA
I-PF, AC, J/ORCA
RW, M, J/ORCA
RW, B, J/ORCA
460: R-PF, AC, J/SETCM
I-PF, AC, J/SETCM
RW, M, J/SETCM
RW, B, J/SETCM
464: R-PF, AC, J/ORCM
I-PF, AC, J/ORCM
RW, M, J/ORCM
RW, B, J/ORCM
470: R-PF, AC, J/ORCB
I-PF, AC, J/ORCB
RW, M, J/ORCB
RW, B, J/ORCB
474: I-PF, AC, J/SETO
I-PF, AC, J/SETO
IW, M, J/SETO
IW, B, J/SETO
500: R-PF, AC, J/HLL
I-PF, AC, J/HLL
RW, M, J/HRR ;HLLM = HRR EXCEPT FOR STORE
RW, S, J/MOVE ;HLLS = MOVES
R-PF, AC, J/HRL
I-PF, AC, J/HRL
RW, M, J/HRLM
RW, S, J/HRLS
510: R-PF, AC, J/HLLZ
I-PF, AC, J/HLLZ
W, M, J/HLLZ
RW, S, J/HLLZ
R-PF, AC, J/HRLZ
I-PF, AC, J/HRLZ
W, M, J/HRLZ
RW, S, J/HRLZ
520: R-PF, AC, J/HLLO
I-PF, AC, J/HLLO
W, M, J/HLLO
RW, S, J/HLLO
R-PF, AC, J/HRLO
I-PF, AC, J/HRLO
W, M, J/HRLO
RW, S, J/HRLO
530: R-PF, AC, J/HLLE
I-PF, AC, J/HLLE
W, M, J/HLLE
RW, S, J/HLLE
R-PF, AC, J/HRLE
I-PF, AC, J/HRLE
W, M, J/HRLE
RW, S, J/HRLE
540: R-PF, AC, J/HRR
I-PF, AC, J/HRR
RW, M, J/HLL ;HRRM = HLL EXCEPT FOR STORE
RW, S, J/MOVE ;HRRS = MOVES
R-PF, AC, J/HLR
I-PF, AC, J/HLR
RW, M, J/HLRM
RW, S, J/HLRS
550: R-PF, AC, J/HRRZ
I-PF, AC, J/HRRZ
W, M, J/HRRZ
RW, S, J/HRRZ
R-PF, AC, J/HLRZ
I-PF, AC, J/HLRZ
W, M, J/HLRZ
RW, S, J/HLRZ
560: R-PF, AC, J/HRRO
I-PF, AC, J/HRRO
W, M, J/HRRO
RW, S, J/HRRO
R-PF, AC, J/HLRO
I-PF, AC, J/HLRO
W, M, J/HLRO
RW, S, J/HLRO
570: R-PF, AC, J/HRRE
I-PF, AC, J/HRRE
W, M, J/HRRE
RW, S, J/HRRE
R-PF, AC, J/HLRE
I-PF, AC, J/HLRE
W, M, J/HLRE
RW, S, J/HLRE
600: I, J/DONE ;TRN- IS NOP
I, J/DONE ;SO IS TLN-
I, TNE, J/TDXX
I, TNE, J/TSXX
I, TNA, J/TDX
I, TNA, J/TSX
I, TNN, J/TDXX
I, TNN, J/TSXX
610: I, J/DONE ;TDN- IS A NOP
I, J/DONE ;TSN- ALSO
R, TNE, J/TDXX
R, TNE, J/TSXX
R, TNA, J/TDX
R, TNA, J/TSX
R, TNN, J/TDXX
R, TNN, J/TSXX
620: I, TZ-, J/TDX
I, TZ-, J/TSX
I, TZE, J/TDXX
I, TZE, J/TSXX
I, TZA, J/TDX
I, TZA, J/TSX
I, TZN, J/TDXX
I, TZN, J/TSXX
630: R, TZ-, J/TDX
R, TZ-, J/TSX
R, TZE, J/TDXX
R, TZE, J/TSXX
R, TZA, J/TDX
R, TZA, J/TSX
R, TZN, J/TDXX
R, TZN, J/TSXX
640: I, TC-, J/TDX
I, TC-, J/TSX
I, TCE, J/TDXX
I, TCE, J/TSXX
I, TCA, J/TDX
I, TCA, J/TSX
I, TCN, J/TDXX
I, TCN, J/TSXX
650: R, TC-, J/TDX
R, TC-, J/TSX
R, TCE, J/TDXX
R, TCE, J/TSXX
R, TCA, J/TDX
R, TCA, J/TSX
R, TCN, J/TDXX
R, TCN, J/TSXX
660: I, TO-, J/TDX
I, TO-, J/TSX
I, TOE, J/TDXX
I, TOE, J/TSXX
I, TOA, J/TDX
I, TOA, J/TSX
I, TON, J/TDXX
I, TON, J/TSXX
670: R, TO-, J/TDX
R, TO-, J/TSX
R, TOE, J/TDXX
R, TOE, J/TSXX
R, TOA, J/TDX
R, TOA, J/TSX
R, TON, J/TDXX
R, TON, J/TSXX
700: IOT, AC DISP, J/GRP700 ;APR & PI
IOT, AC DISP, J/GRP701 ;PAG & CCA
702: IOT, AC DISP, M, J/GRP702 ;.RD. & .WR.
703: I, B/3, J/IOT700
704: IOT, J/UMOVE
IOT, J/UMOVEM
706: I, B/6, J/IOT700
I, B/7, J/IOT700
710: IOT, WORD-TNE, J/TIOX ;TIOE ;IORDI
711: IOT, WORD-TNN, J/TIOX ;TION ;IORDQ
712: IOT, B/10, J/RDIO ;RDIO ;IORD
713: IOT, B/10, J/WRIO ;WRIO ;IOWR
714: IOT, B/10, J/BIXUB ;BSIO ;IOWRI
715: IOT, B/14, J/BIXUB ;BCIO ;IOWRQ
716: I, B/6, J/IOT710
I, B/7, J/IOT710
720: IOT, TNE, J/TIOX ;TIOEB ;IORDBI
721: IOT, TNN, J/TIOX ;TIONB ;IORDBQ
722: IOT, B/0, J/RDIO ;RDIOB ;IORDB
723: IOT, B/0, J/WRIO ;WRIOB ;IOWRB
724: IOT, B/0, J/BIXUB ;BSIOB ;IOWRBI
725: IOT, B/4, J/BIXUB ;BCIOB ;IOWRBQ
726: I, B/6, J/IOT720
I, B/7, J/IOT720
730: I, B/0, J/IOT730
I, B/1, J/IOT730
I, B/2, J/IOT730
I, B/3, J/IOT730
I, B/4, J/IOT730
I, B/5, J/IOT730
I, B/6, J/IOT730
I, B/7, J/IOT730
740: I, B/0, J/IOT740
I, B/1, J/IOT740
I, B/2, J/IOT740
I, B/3, J/IOT740
I, B/4, J/IOT740
I, B/5, J/IOT740
I, B/6, J/IOT740
I, B/7, J/IOT740
750: I, B/0, J/IOT750
I, B/1, J/IOT750
I, B/2, J/IOT750
I, B/3, J/IOT750
I, B/4, J/IOT750
I, B/5, J/IOT750
I, B/6, J/IOT750
I, B/7, J/IOT750
760: I, B/0, J/IOT760
I, B/1, J/IOT760
I, B/2, J/IOT760
I, B/3, J/IOT760
I, B/4, J/IOT760
I, B/5, J/IOT760
I, B/6, J/IOT760
I, B/7, J/IOT760
770: I, B/0, J/IOT770
I, B/1, J/IOT770
I, B/2, J/IOT770
I, B/3, J/IOT770
I, B/4, J/IOT770
I, B/5, J/IOT770
I, B/6, J/IOT770
I, B/7, J/IOT770

1115
src/kshack/extend.4 Executable file
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587
src/kshack/flt.5 Executable file
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;;;-*-Fundamental-*-
.TOC "FLOATING POINT -- FAD, FSB"
.DCODE
140: FL-R, FL-AC, J/FAD
142: FL-RW, FL-MEM, J/FAD
FL-RW, FL-BOTH, J/FAD
FL-R, FL-AC, ROUND, J/FAD
FL-I, FL-AC, ROUND, J/FAD
FL-RW, FL-MEM, ROUND, J/FAD
FL-RW, FL-BOTH, ROUND, J/FAD
150: FL-R, FL-AC, J/FSB
152: FL-RW, FL-MEM, J/FSB
FL-RW, FL-BOTH, J/FSB
FL-R, FL-AC, ROUND, J/FSB
FL-I, FL-AC, ROUND, J/FSB
FL-RW, FL-MEM, ROUND, J/FSB
FL-RW, FL-BOTH, ROUND, J/FSB
.UCODE
;BOTH FAD & FSB ARE ENTERED WITH THE MEMORY OPERAND IN AR
; SIGN SMEARED. THE EXPONENT IN BOTH SC AND FE.
1576:
FSB: [AR]_-[AR] ;MAKE MEMOP NEGATIVE
1577:
FAD: [BR]_AC, SC_SC-EXP-1, 3T, SCAD DISP
=0*
FAS1: READ [BR], SKIP DP0, J/FAS2 ;BR .LE. AR
[ARX]_[AR] ;SWAP AR AND BR
[AR]_[BR], SC_EXP
[BR]_[ARX], SC_SC-FE-1 ;NUMBER OF SHIFT STEPS
READ [AR], FE_EXP, 2T, SKIP DP0
=0 [AR]_+SIGN, J/FAS3
[AR]_-SIGN, J/FAS3
=0 ;SIGN SMEAR BR AND UNNORMALIZE
FAS2: [BR]_+SIGN, J/FAS3
[BR]_-SIGN, J/FAS3
FAS3: Q_0, STEP SC
=0
FAS4: [BR]_[BR]*.5 LONG, STEP SC, ASHC, J/FAS4
[AR]_[AR]+[BR], NORM DISP, J/SNORM
.TOC "FLAOTING POINT -- FMP"
.DCODE
160: FL-R, FL-AC, J/FMP
162: FL-RW, FL-MEM, J/FMP
FL-RW, FL-BOTH, J/FMP
FL-R, FL-AC, ROUND, J/FMP
FL-I, FL-AC, ROUND, J/FMP
FL-RW, FL-MEM, ROUND, J/FMP
FL-RW, FL-BOTH, ROUND, J/FMP
.UCODE
1570:
FMP: [BRX]_AC, ;GET AC
FE_SC+EXP, 3T, ;EXPONENT OF ANSWER
SKIP DP0 ;GET READY TO SMEAR SIGN
=0 [BRX]_+SIGN, J/FMP1 ;POSITIVE
[BRX]_-SIGN, J/FMP1 ;NEGATIVE
FMP1: Q_[AR], SC_27. ;GET MEMORY OPERAND
=01* [BRX]_[BRX]*.5 LONG, ;SHIFT RIGHT
CALL [MULSUB] ;MULTIPLY
Q_Q.AND.#, #/777000, ;WE ONLY COMPUTED
HOLD LEFT ; 27 BITS
[AR]_[ARX], FE_FE+2 ;SET SHIFT PATHS
[AR]_[AR]*.5 LONG, ;SHIFT OVER
FE_FE-200, ;ADJUST EXPONENT
NORM DISP, J/SNORM ;NORMALIZE & EXIT
.TOC "FLOATING POINT -- FDV"
.DCODE
170: FL-R, FL-AC, J/FDV
172: FL-RW, FL-MEM, J/FDV
FL-RW, FL-BOTH, J/FDV
FL-R, FL-AC, ROUND, J/FDV
FL-I, FL-AC, ROUND, J/FDV
FL-RW, FL-MEM, ROUND, J/FDV
FL-RW, FL-BOTH, ROUND, J/FDV
.UCODE
1574:
FDV: [BR]_[AR], SKIP AD.EQ.0, AC ;COPY DIVSOR SEE IF 0
=0
[AR]_AC, FE_SC-EXP, SKIP DP0, ;GET AC & COMPUTE NEW
J/FDV0 ; EXPONENT
FL NO DIVIDE ;DIVIDE BY ZERO
=0
FDV0: [AR]_+SIGN, J/FDV1
[AR]_-SIGN, J/FDV2
FDV1: [ARX]_[AR],FE_-FE+200,J/FDV3 ;COMPUTE 2*DVND
FDV2: [ARX]_-[AR],FE_-FE+200,J/FDV3 ;ABSOLUTE VALUE
FDV3: [BRX]_[BR]*2, SKIP DP0 ;ABSOLUTE VALUE
=0
FDV4: [ARX]-[BRX], SKIP CRY0, 3T, J/FDV5 ;FLOATING NO DIV?
[BRX]_-[BR]*2, J/FDV4 ;FORCE ABSOLUTE VALUE
=0
FDV5: [BRX]_[BRX]*.5, J/FDV6 ;SHIFT BACK ARX
FL NO DIVIDE ;UNNORMALIZED INPUT
=0
FDV6: [AR]_[AR]*2, ;DO NOT DROP A BIT
CALL [SBRL] ;AT FDV7+1
[BRX]-[ARX], SKIP AD.LE.0 ;IS ANSWER .LE. 1?
=00100
FDV7: Q_0, SC_27., CALL [DIVSGN] ;DIVIDE
=00101 [AR]_[AR]*.5, FE_FE+1, J/FDV7 ;SCALE DV'END
=01100
FDV8: [AR]_Q*.5, J/FDV9 ;PUT ANSWER IN AR
=01101 READ [AR], SKIP AD.EQ.0, ;-VE ANSWER, LOOK AT RMDR
CALL [SETSN] ; SEE HOW TO NEGATE
=01110 READ [AR], SKIP AD.EQ.0, ;-VE ANSWER, LOOK AT RMDR
CALL [SETSN] ; SEE HOW TO NEGATE
=01111 [AR]_Q*.5, J/FDV9 ;PUT ANSWER IN AR
=11111 [AR]_-Q*.5, J/FDV9 ;ZERO RMDR
FDV9: Q_0, J/SNORM0 ;GO NORMALIZE
.TOC "FLOATING POINT -- FLTR, FSC"
.DCODE
127: R, FL-AC,ROUND, J/FLTR
132: I, FL-AC, J/FSC
.UCODE
1616:
FLTR: [AR].AND.#, #/777000, 3T, SKIP ADL.EQ.0 ;SMALL POS NUMBER?
=0 [BR]_-[AR], SKIP DP0, 3T, J/FLTR1 ;NO--SEE IF MINUS
Q_0, FE_S#, S#/233, J/SNORM0 ;FITS IN 27 BITS
=0
FLTR1: [BR].AND.#, #/777000, 3T,
SKIP ADL.EQ.0, J/FLTR1A ;SMALL NEGATIVE NUMBER
Q_0, FE_S#, S#/244, J/FLTR2 ;LARGE POS NUMBER
=0
FLTR1A: Q_0, FE_S#, S#/244, J/FLTR2 ;BIG NUMBER
Q_0, FE_S#, S#/233, J/SNORM0 ;FITS IN 27 BITS
;AT THIS POINT WE KNOW THE NUMBER TAKES MORE THAN 27 BITS. WE JUST
; SHIFT 8 PLACES RIGHT AND NORMALIZE. WE COULD BE MORE CLEVER BUT
; THIS IS THE RARE CASE ANYWAY.
FLTR2: [AR]_[AR]*.5 LONG, ASHC, SC_6 ;SHOVE OVER TO THE RIGHT
=0
FLTR3: [AR]_[AR]*.5 LONG, ASHC, ;SHIFT RIGHT 9 PLACES
STEP SC, J/FLTR3 ; SO IT WILL FIT
SNORM0: READ [AR], NORM DISP, J/SNORM ;NORMALIZE ANSWER
1621:
FSC: READ [AR], SC_SHIFT
Q_0, AC ;DON'T SHIFT IN JUNK
[AR]_AC, FE_SC+EXP, SKIP DP0 ;SIGN SMEAR
=0 [AR]_+SIGN, J/SNORM0
[AR]_-SIGN, J/SNORM0
.TOC "FLOATING POINT -- FIX AND FIXR"
.DCODE
122: FL-R, FL-AC, J/FIX
126: FL-R, FL-AC,ROUND, J/FIX
.UCODE
1626:
FIX: Q_0, SCAD/A+B, SCADA/S#, ;CLEAR Q, SEE IF
S#/1534, SCADB/FE, 3T, ; ANSWER FITS IN
SCAD DISP ; 35 BITS.
=0* SET AROV, J/NIDISP ;TOO BIG
SC_FE+S#, S#/1544, 3T, SCAD DISP ;NEED TO MOVE LEFT?
=0* STEP SC, J/FIXL
SC_S#-FE, S#/232 ;NUMBER OF PLACES TO SHIFT
; RIGHT
STEP SC ;ALREADY THERE
=0
FIXR: [AR]_[AR]*.5 LONG, ASHC, ;SHIFT BINARY POINT
STEP SC, J/FIXR ; TO BIT 35.5
[BR]_[ONE]*.5, B DISP, J/FIXX ;WHICH KIND OF FIX?
=0
FIXL: [AR]_[AR]*2, STEP SC, J/FIXL ;SHIFT LEFT
AC_[AR], NEXT INST ;WE ARE NOW DONE
=0*11
FIXX: READ [AR], SKIP DP0, J/FIXT ;FIX--SEE IF MINUS
FIXX1: [AR]_[AR]+[BR], FL-EXIT ;FIXR--ROUND UP
=0
FIXT: AC_[AR], NEXT INST ;FIX & +, TRUNCATE
READ Q, SKIP AD.EQ.0 ;NEGATIVE--ANY FRACTION?
=0 [AR]_[AR]+1, FL-EXIT ;YES--ROUND UP
[BR]_.NOT.[MASK], ;MAYBE--GENERATE .75
J/FIXX1 ;ROUND UP IF BIT 36 OR
; 37 SET
.TOC "FLOATING POINT -- SINGLE PRECISION NORMALIZE"
;NORMALIZE DISPATCH IS A 9-WAY DISPATCH. THE HARDWARE LOOKS AT
; 4 SIGNALS: DP=0, DP BIT 8, DP BIT 9, DP BIT -2. THE 9 CASES
; ARE:
; DP=0 DP08 DP09 DP00 ACTION TO TAKE
; 0 0 0 0 SHIFT LEFT
;
; 0 0 0 1 NEGATE AND RETRY
;
; 0 0 1 0 ALL DONE
;
; 0 0 1 1 NEGATE AND RETRY
;
; 0 1 0 0 SHIFT RIGHT
;
; 0 1 0 1 NEGATE AND RETRY
;
; 0 1 1 0 SHIFT RIGHT
;
; 0 1 1 1 NEGATE AND RETRY
;
; 1 - - - LOOK AT Q BITS
;ENTER HERE WITH UNNORMALIZED NUMBER IN AR!Q. FE HOLDS THE NEW
; EXPONENT. CALL WITH NORM DISP
=0000 ;9-WAY DISPATCH
SNORM: [AR]_[AR]*2 LONG, DIV, FE_FE-1, NORM DISP, J/SNORM
Q_-Q, SKIP CRY0, 3T, J/SNNEG
READ [AR], NORM DISP, CALL [SROUND]
Q_-Q, SKIP CRY0, 3T, J/SNNEG
[AR]_[AR]*.5, FE_FE+1, CALL [SROUND]
Q_-Q, SKIP CRY0, 3T, J/SNNEG
[AR]_[AR]*.5, FE_FE+1, CALL [SROUND]
Q_-Q, SKIP CRY0, 3T, J/SNNEG
READ Q, SKIP AD.EQ.0, J/SNORM1
=1110 [AR]_EXP, J/FLEX
=
=0
SNORM1: [AR]_[AR]*2 LONG, DIV, FE_FE-1, NORM DISP, J/SNORM
FLEX: FL-EXIT
=0
SNNEG: [AR]_.NOT.[AR], NORM DISP, J/SNNORM ;NEGATE HIGH WORD
; (NO CARRY)
[AR]_-[AR], NORM DISP, J/SNNORM ;NEGATE HIGH WORD (W/CARRY)
=0000
SNNORM: [AR]_[AR]*2 LONG, DIV, FE_FE-1, NORM DISP, J/SNNORM
=0010 READ [AR], NORM DISP, CALL [SROUND]
=0100 [AR]_[AR]*.5, FE_FE+1, CALL [SROUND]
=0110 [AR]_[AR]*.5, FE_FE+1, CALL [SROUND]
=1000 [AR]_[AR]*2 LONG, DIV, FE_FE-1, NORM DISP, J/SNNORM ;[120]
=1110 [AR]_EXP, B DISP
=
=0111 TL [FLG], FLG.SN/1, J/SNNOT
[AR]_[AR].AND.[MASK], ;CLEAR ANY LEFT OVER BITS
J/SNNOT1
=0
SNNOT: [AR]_.NOT.[AR], J/SNNOT2
READ Q, SKIP AD.EQ.0
=0 [AR]_.NOT.[AR], J/SNNOT2
SNNOT1: [AR]_-[AR], J/SNNOT2 ;NORMAL NEGATE AND EXIT
SNNOT2: [FLG]_[FLG].AND.NOT.#, FLG.SN/1, HOLD RIGHT
FL-EXIT
.TOC "FLOATING POINT -- ROUND ANSWER"
=*01*
SROUND: [BR]_[ONE]*.5, B DISP, J/SRND1
[AR]_[AR]*.5, FE_FE+1, J/SROUND ;WE WENT TOO FAR
=0111
SRND1: RETURN [16] ;NOT ROUNDING INSTRUCTION
[AR]_[AR]+[BR], NORM DISP
=*01* RETURN [16]
[AR]_[AR]*.5, FE_FE+1, RETURN [16]
.TOC "FLOATING POINT -- DFAD, DFSB"
.DCODE
110: DBL FL-R, J/DFAD
111: DBL FL-R, J/DFSB
.UCODE
;ENTER FROM A-READ CODE WITH:
;FE/ EXP
;SC/ EXP
;AR/ C(E) SHIFT RIGHT 2 PLACES
;ARX/ C(E+1) SHIFTED RIGHT 1 PLACE
1635:
DFSB: [ARX]_-[ARX] ;NEGATE LOW WORD
[AR]_-[AR]-.25, MULTI PREC/1
1637:
DFAD: [BRX]_(AC[1].AND.[MAG])*.5, 3T ;GET LOW WORD
[BR]_AC*.5, 3T, ;GET AC AND START TO SHIFT
SC_SC-EXP-1, ;NUMBER OF PLACES TO SHIFT
SKIP DP0 ;SEE WHAT SIGN
=0 [BR]_+SIGN*.5, 3T, ;SIGN SMEAR
AC, SKIP/SC, J/DFAS1 ;SEE WHICH IS BIGGER
[BR]_-SIGN*.5, 3T, ;SIGN SMEAR
AC, SKIP/SC, J/DFAS1 ;SEE WHICH IS BIGGER
=0
DFAS1: Q_[BRX], ;AR IS BIGGER
J/DFAS2 ;ADJUST BR!Q
[T0]_AC, ;BR IS BIGGER OR EQUAL
SC_EXP, 2T, J/DFAS3 ;SET SC TO THAT EXPONENT
;HERE IF AR!ARX IS GREATER THAN BR!BRX
=0
DFAS2: [T0]_[BR], CALL [DFADJ] ;ADJUST BR!Q
[BR]_[T0] ;PUT ANSWER BACK
Q_Q+[ARX], J/DFAS5 ;ADD LOW WORDS
;HERE IS BR!BRX IF GREATER THAN OR EQUAL TO AR!ARX
DFAS3: Q_[ARX], ;SETUP TO SHIFT AR!ARX
SC_SC-FE-1 ;COMPUTE # OF PLACES
READ [T0], FE_EXP ;EXPONENT OF ANSWER
=0 [T0]_[AR], CALL [DFADJ] ;ADJUST AR!Q
[AR]_[T0] ;PUT ANSWER BACK
Q_Q+[BRX], J/DFAS5 ;ADD LOW WORDS
;BIT DIDDLE TO GET THE ANSWER (INCLUDING 2 GUARD BITS) INTO
; AR!Q
DFAS5: [AR]_([AR]+[BR])*.5 LONG, ;ADD HIGH WORDS
MULTI PREC/1, ASHC ;INJECT SAVED CRY2
[AR]_[AR]*2 LONG, ;SHIFT BACK LEFT
ASHC, MUL DISP ;SEE IF WE LOST A 1
=1011
DFAS6: [T1]_[T1].AND.NOT.[MASK], J/DFAS7
Q_Q+.25, J/DFAS6
DFAS7: [AR]_[AR]*2 LONG, ASHC, ;PUT IN GUARD BITS
FE_FE-1
[AR]_[AR]*2 LONG, ASHC,
FE_FE-1
Q_[T1].OR.Q, HOLD LEFT, J/DNORM0
;SUBROUTINE TO ADJUST NUMBER IN T0!Q
;RETURNS 1 WITH
; T0!Q ADJUSTED
; FLG.SN=1 IF WE SHIFTED OUT ANY 1 BITS (STICKY BIT)
; T1 HAS Q TWO STEPS PRIOR TO BEING DONE
DFADJ "STEP SC, ASHC, MUL DISP"
=0**11
DFADJ: [T0]_[T0]*2 LONG, DIV, ;MOVE EVERYTHING 2 PLACES
CALL [CLRSN]
[T0]_[T0]*2 LONG, DIV
[T0]_[T0]*2 LONG, DIV
[T0]_[T0]*.5 LONG, ASHC, ;SHIFT AT LEAST 1 PLACE
STEP SC
=1010
DFADJ1: [T0]_[T0]*.5 LONG, ;UNNORMALIZE T0!Q
DFADJ, J/DFADJ1 ;LOOP TILL DONE
DFADJ2: [T1]_Q, ;SAVE GUARD BITS
MUL DISP, J/DFADJ5 ;LOOK AT LAST BIT
[FLG]_[FLG].OR.#, FLG.SN/1, HOLD RIGHT, J/DFADJ3
[FLG]_[FLG].OR.#, FLG.SN/1, HOLD RIGHT, J/DFADJ4
=0
DFADJ3: [T0]_[T0]*.5 LONG, ASHC, STEP SC, J/DFADJ3
DFADJ4: [T1]_Q ;SAVE 2 GUARD BITS
=1011
DFADJ5: [T0]_[T0]*.5 LONG, ASHC, J/DFADJ6
[FLG]_[FLG].OR.#, FLG.SN/1, HOLD RIGHT, J/DFADJ5
DFADJ6: [T0]_[T0]*.5 LONG, ASHC, RETURN [1]
.TOC "FLOATING POINT -- DFMP"
.DCODE
112: DBL FL-R, DAC, J/DFMP
.UCODE
;SAME ENTRY CONDITIONS AS DFAD/DFSB
1631:
DFMP: Q_[ARX], SC_6 ;SHIFT MEM OP 8 PLACES
=0
DFMP1: [AR]_[AR]*2 LONG, ASHC, ;SHIFT
STEP SC, J/DFMP1
Q_Q*.5
Q_Q.AND.#, #/077777, HOLD RIGHT
[BR]_Q ;COPY LOW WORD
;
; BRX * BR ==> C(E+1) * C(AC+1)
;
[BRX]_(AC[1].AND.[MAG])*.5 ;GET LOW AC
=0** [BRX]_[BRX]*.5, SC_35., CALL [MULSB1]
;
; BRX * Q ==> C(E) * C(AC+1)
;
Q_[AR], SC_35. ;GO MULT NEXT HUNK
=0** CALL [MULTIPLY]
[T0]_[ARX] ;SAVE PRODUCT
[ARX]_Q*.5, SC_FE ;PUT IN NEXT STEP
;
; BRX * BR ==> C(AC) * C(E+1)
;
[BRX]_AC*.5, ;PREPARE TO DO HIGH HALF
FE_SC+EXP, ;EXPONENT ON ANSWER
SKIP DP0, 3T
=0 [BRX]_+SIGN*.5, 3T, J/DFMP2
[BRX]_-SIGN*.5, 3T
=0**
DFMP2: Q_[BR], SC_35., CALL [MULTIPLY] ;GO MULTIPLY
[T1]_Q ;SAVE FOR ROUNDING
[ARX]_[ARX]+[T0] ;PREPARE FOR LAST MUL
;
; BRX * Q ==> C(AC) * C(E)
;
=0** Q_[AR], SC_35., ;DO THE LAST MULTIPLY
CALL [MULTIPLY] ; ..
;OK, WE NOW HAVE THE PRODUCT IN ARX!Q!T1. ALL WE NEED TO DO
; IS SOME BIT DIDDLES TO GET EVERYTHING IN THE RIGHT PLACE
[AR]_[ARX]*.5 LONG, ;SHIFT THE ANSWER
FE_FE+S#, S#/1576 ;CORRECT EXPONENT
=0**11 READ [T1], SKIP AD.EQ.0, ;SEE IF LOW ORDER 1
CALL [SETSN] ; BITS AROUND SOMEPLACE
[AR]_[AR]*2 LONG, ASHC ;SHIFT LEFT
[BR]_[ONE]*.5 ;PLACE TO INSTERT BITS
TL [T1], #/200000 ;ANYTHING TO INJECT?
=0 Q_Q+[BR] ;YES--PUT IT IN
[AR]_[AR]*2 LONG, ASHC ;MAKE ROOM FOR MORE
TL [T1], #/100000 ;ANOTHER BIT NEEDED
=0 Q_Q+[BR] ;YES--PUT IN LAST BIT
DNORM0: READ [AR], NORM DISP, ;SEE WHAT WE NEED TO DO
FE_FE+S#, S#/2, J/DNORM ;ADJUST FOR INITIAL SHIFTS
.TOC "FLOATING POINT -- DFDV"
.DCODE
113: DBL FL-R, DAC, J/DFDV
.UCODE
1636:
DFDV: [BRX]_[ARX] ;COPY OPERAND (COULD SAVE TIME
; WITH SEPERATE A-READ FOR DFDV)
=1**10 [T1]_0, CALL [CLRSN] ;CLEAR FLAG
[BR]_[AR], SKIP AD.LE.0, ;SEE IF POSITIVE
AC[1] ;WARM UP RAM
=0
DFDV1: [ARX]_(AC[1].AND.[MAG])*.5, ;POSITIVE--GET AC
J/DFDV2 ; AND CONTINUE BELOW
[T1]_.NOT.[T1] ;DV'SOR NEGATIVE (OR ZERO)
[BRX]_-[BRX] ;NEGATE LOW WORD
AD/-B-.25, B/BR, DEST/AD, ;NEGATE HIGH WORD
MULTI PREC/1, 3T, ;ADDING IN CRY02
SKIP DP0, AC[1], ;SEE IF STILL NEGATIVE
J/DFDV1 ; ..
DFDV2: [AR]_AC*.5, ;GET AC AND SHIFT
FE_SC-EXP, 3T, ;COMPUTE NEW EXPONENT
SKIP DP0 ;SEE IF NEGATIVE
=0 [AR]_+SIGN*.5, 3T, J/DFDV3 ;POSITIVE
[T1]_.NOT.[T1] ;NEGATIVE OR ZERO
[AR]_-SIGN*.5, 3T ;SIGN SMEAR
Q_-[ARX] ;NEGATE OPERAND
[AR]_(-[AR]-.25)*.5 LONG, ;NEGATE HIGH WORD
MULTI PREC/1, ;USE SAVED CARRY
ASHC, J/DFDV4 ;CONTINUE BELOW
=0
DFDV3: Q_[ARX], ;COPY OPERAND
CALL [DDIVS] ;SHIFT OVER
DFDV4: [AR]-[BR], 3T, SKIP DP0 ;SEE IF OVERFLOW
=0 FL NO DIVIDE
[ARX]_Q ;START DIVISION
=0* Q_0, SC_26., CALL [DBLDIV]
[T0]_Q, SC_35.
=0* Q_Q.AND.NOT.[MAG], ;SEE IF ODD
SKIP AD.EQ.0, ;SKIP IF EVEN
CALL [DBLDIV] ;GO DIVIDE
Q_Q*.5 ;MOVE ANSWER OVER
=
[T0]_[T0]*2 LONG, ASHC, ;DO FIRST NORM STEP
MUL DISP ; SEE IF A 1 FELL OUT
=1011
DFDV4A: READ [T1], SKIP DP0, ;SHOULD RESULT BE NEGATIVE
FE_S#-FE, S#/202, ;CORRECT EXPONENT
J/DFDV4B ;LOOK BELOW
Q_Q+.25, J/DFDV4A ;PUT BACK THE BIT
=0
DFDV4B: [AR]_[T0], NORM DISP, J/DNORM ;PLUS
[AR]_[T0], NORM DISP, J/DNNORM ;MINUS
.TOC "FLOATING POINT -- DOUBLE PRECISION NORMALIZE"
;NORMALIZE AR!Q
;DNORM0: READ [AR], NORM DISP, ;SEE WHAT WE NEED TO DO
; FE_FE+S#, S#/2, J/DNORM ;ADJUST FOR INITIAL SHIFTS
=0000
DNORM: [AR]_[AR]*2 LONG, ;SHIFT LEFT
FE_FE-1, ASHC, ;ADJUST EXPONENT
NORM DISP, J/DNORM ;TRY AGAIN
TL [FLG], FLG.SN/1, J/DNEG ;RESULT IS NEGATIVE
READ [AR], NORM DISP, ;SEE IF WE WENT TOO FAR
CALL [DROUND] ; AND ROUND ANSWER
TL [FLG], FLG.SN/1, J/DNEG ;RESULT IS NEGATIVE
[AR]_[AR]*.5 LONG, ASHC,
FE_FE+1, CALL [DROUND]
TL [FLG], FLG.SN/1, J/DNEG ;RESULT IS NEGATIVE
[AR]_[AR]*.5 LONG, ASHC,
FE_FE+1, CALL [DROUND]
TL [FLG], FLG.SN/1, J/DNEG ;RESULT IS NEGATIVE
Q_[MAG].AND.Q, ;HIGH WORD IS ZERO
HOLD RIGHT, J/DNORM1 ;GO TEST LOW WORD
=1110 [FLG]_[FLG].AND.NOT.#, FLG.SN/1, HOLD RIGHT ;[122] CLEAR FLG.SN
=
AC[1]_[ARX].AND.[MAG], ;STORE LOW WORD
J/STAC ;GO DO HIGH WORD
DNORM1: READ Q, SKIP AD.EQ.0 ;TEST LOW WORD
=0 [AR]_[AR]*2 LONG, ;LOW WORD IS NON-ZERO
FE_FE-1, ASHC, ;ADJUST EXPONENT
NORM DISP, J/DNORM ;KEEP LOOKING
AC[1]_[AR], J/STAC ;WHOLE ANSWER IS ZERO
;HERE TO NORMALIZE NEGATIVE D.P. RESULTS
=0
DNEG: Q_.NOT.Q, J/DNEG1 ;ONES COMP
Q_-Q, SKIP CRY2, J/DNEG2
DNEG1: [FLG]_[FLG].AND.NOT.#, FLG.SN/1, HOLD RIGHT
=0
DNEG2: [AR]_.NOT.[AR], ;NO CARRY
NORM DISP, J/DNNORM ;GO NORMALIZE
[AR]_-[AR], ;CARRY
NORM DISP, J/DNNORM ;NORMALIZE
=000*
DNNORM: [AR]_[AR]*2 LONG, ;SHIFT 1 PLACE
FE_FE-1, ASHC, ;ADJUST EXPONENT
NORM DISP, J/DNNORM ;LOOP TILL DONE
=001* READ [AR], NORM DISP, ;SEE IF WE WENT TOO FAR
CALL [DROUND] ; AND ROUND ANSWER
=010* [AR]_[AR]*.5 LONG, ASHC,
FE_FE+1, CALL [DROUND]
=011* [AR]_[AR]*.5 LONG, ASHC,
FE_FE+1, CALL [DROUND]
=100* Q_[MAG].AND.Q, ;HIGH WORD IS ZERO
HOLD RIGHT, J/DNNRM1 ;GO TEST LOW WORD
=111* [ARX]_[ARX].AND.[MASK] ;REMOVE ROUNDING BIT
=
=00 [ARX]_[ARX].AND.[MAG], ;ALSO CLEAR SIGN
CALL [CHKSN] ;ONES COMP?
=10 [ARX]_[ARX].XOR.[MAG], ;YES--ONES COMP
J/DNN1 ;CONTINUE BELOW
=11 [ARX]_-[ARX], 3T, ;NEGATE RESULT
SKIP CRY1, J/DNN2
=
DNN1: [FLG]_[FLG].AND.NOT.#, FLG.SN/1, HOLD RIGHT ;CLEAR FLAG
=0
DNN2: AC_.NOT.[AR], J/DNORM2
AC_-[AR], 3T
DNORM2: AC[1]_[ARX].AND.[MAG], ;STORE LOW WORD
NEXT INST ;ALL DONE
DNNRM1: READ Q, SKIP AD.EQ.0 ;TEST LOW WORD
=0 [AR]_[AR]*2 LONG, ;LOW WORD IS NON-ZERO
FE_FE-1, ASHC, ;ADJUST EXPONENT
NORM DISP, J/DNNORM ;KEEP LOOKING
AC[1]_[AR], J/STAC ;WHOLE ANSWER IS ZERO
CHKSN: TL [FLG], FLG.SN/1, RETURN [2]
;SUBROUTINE TO SET/CLEAR FLG.SN
;CALL WITH:
; CALL [SETSN], SKIP IF WE SHOULD CLEAR
;RETURNS 23
=0
SETSN: [FLG]_[FLG].OR.#, FLG.SN/1, HOLD RIGHT, RETURN [23]
CLRSN: [FLG]_[FLG].AND.NOT.#, FLG.SN/1, HOLD RIGHT, RETURN [23]
;SUBROUTINE TO ROUND A FLOATING POINT NUMBER
;CALL WITH:
; NUMBER IN AR!Q AND NORM DISP
;RETURNS 16 WITH ROUNDED NUMBER IN AR!ARX
;
=*01*
DROUND: [ARX]_(Q+1)*.5, ;ROUND AND SHIFT
SKIP CRY2, ;SEE IF OVERFLOW
J/DRND1 ;COMPLETE ROUNDING
[AR]_[AR]*.5 LONG, ;WE WENT TOO FAR
FE_FE+1, ASHC, J/DROUND ;SHIFT BACK AND ROUND
=*010
DRND1: [AR]_EXP, RETURN [16] ;NO OVERFLOW
=011 [AR]_[AR]+.25, ;ADD CARRY (BITS 36 AND 37
; ARE COPIES OF Q BITS)
NORM DISP, ;SEE IF OVERFLOW
J/DRND1 ; ..
=110 [AR]_[AR]*.5, ;SHIFT RIGHT
FE_FE+1, ;KEEP EXP RIGHT
J/DRND1 ;ALL SET NOW
=

1254
src/kshack/inout.50 Executable file
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26
src/kshack/its.16 Executable file
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;;;-*-Fundamental-*-
.TOC "MICROCODE CONDITIONAL ASSEMBLY PARAMETERS FOR ITS"
.SET/CIRC=1 ;Enable CIRC instruction.
.SET/ITS=1 ;ITS style microcode.
.SET/JPC=0 ;No JPC initially.
.SET/1PROC=1 ;One-Proceed feature.
.SET/PCST=1 ;PC Sample Table
.SET/ITSIO=1 ;ITS I/O instructions.
.SET/TEST=0 ;1 => Testing some new feature.
MICROCODE VERSION/=<99:107>
UCV=263.
HARDWARE OPTIONS/=<90:92>
HWOPT=0
HARDWARE SERIAL NUMBER/=<93:107>
HWSER=1729.

424
src/kshack/itspag.98 Executable file
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; -*- Fundamental -*-
.TOC "ITS PAGE REFILL CODE"
.IF/ITS
CLEANUP DONE "END STATE, SKIP IRPT, J/PFTRAP"
CLEANUP AND TRAP "[AR]_WORK[SV.VMA], SKIP/TRAP CYCLE, J/CLTRP"
;ITS page table entry:
; (when shifted left once the valid bit, cache bit, write bit and page
; number will be in the right place for loading the hardware.)
PTE VALID/=<91> ;2.8 (internal to the microcode)
PTE AGE/=<94> ;2.5
ALL=1 ; (actually a field of length 1)
PTE WRITE/=<94> ;2.5 (internal to the microcode)
PTE CACHE/=<95> ;2.4
PTE PAGE/=<98:107> ;2.1 - 1.1
;Hardware page table control bits:
PT VALID/=<90> ;2.9
PT WRITE/=<93> ;2.6
PT CACHE/=<94> ;2.5
PT PAGE/=<97:107> ;2.2 - 1.1
EVEN=3776
ALL=3777
; VMA flags: Page fail word flags:
;4.9 User mode User mode
;FORCE USER
;4.8 Exec mode Nonexistent IO register
NONEXISTENT IO REGISTER/=<91> ;J/IOW5
;4.7 Instruction fetch Nonexistent memory
NONEXISTENT MEMORY/=<92> ;J/PFD
;4.6 Read Uncorrectable memory error
UNCORRECTABLE MEMORY ERROR/=<93> ;J/PFD, J/BADDATA
;4.5 Write test
;WRITE TEST
;4.4 Write Memory write
;WRITE CYCLE
;4.3 2.9 from page table entry
;4.2 Don't cache 2.8 from page table entry
PAGE ACCESS/=<96:97>
;4.1 Physical Physical
;PHYSICAL
;3.4 - 1.1 Address Address
ADDRESS HIGH/=<104:107>
MEMORY=3 ;20 bits of physical memory address.
IO=17 ;22 bits of IO address.
ALL=17
; (These VMA flags only from DP:)
;3.8 IO cycle IO cycle
;IO CYCLE
;3.7 WRU cycle
;3.6 Vector cycle
;3.5 Byte cycle IO byte cycle
;IO BYTE
; (These VMA flags only from #:)
;3.9 - 3.7 XCTR control
;3.6 Hack for AREAD: DROM supplies 4.6 - 4.4 and 3.4
;3.5 Ignore 4.9 - 3.7 from # and use 4.9 - 3.5 from DP instead.
;3.4 Load the VMA
;3.3 Extended address: Use 3.4 - 3.1
;3.2 Wait: Start a cycle.
;3.1 Hack for BWRITE: DROM supplies 3.2
.DCODE
257: IOT, AC, J/UUO257 ;Used to be MAP
.UCODE
1553:
UUO257: UUO
;The hardware comes here with a page fail or pending interrupt:
3777:
PAGE-FAIL:
WORK[SV.AR]_[AR]
;;INTERRUPT-TRAP macro (which nobody uses) does the above and comes
;;here:
ITRAP: WORK[SV.ARX]_[ARX] ;J/MVSKP
WORK[SV.BRX]_[BRX]
[BRX]_VMA ;BRX: FLAGS,,VMA
WORK[SV.VMA]_[BRX],
SKIP IRPT ;See if interrupt (saves a dispatch)
=0000
PFD: DBM/PF DISP, DBUS/DBM, ;Puts page fail condition on
AD/D, DEST/PASS, 4T, ;DP 18-21.
DISP/DP LEFT, J/PFD ;Dispatch on it.
=0001 WORK[SV.BR]_[BR], ;(1) Interrupt
J/PF-INT
=0011 [BRX]_IO DATA, ;(3) Parity
AD PARITY OK/0, ;Don't look at parity.
J/BADDATA
=0101 [BRX]_[100000] XWD 0, ;(5) NXM
J/HARD
=0111 [BRX]_[140000] XWD 0, ;(7) NXM & Parity
J/HARD
=1000 WORK[SV.BR]_[BR], ;(10) Read-only page
J/PFMAP
=1001 WORK[SV.BR]_[BR], ;[123] (11) 1 ms timer and movsrj
J/PF-INT
=1010 WORK[SV.BR]_[BR], ;(12) Nonexistent page
J/PFMAP
=1011 WORK[SV.BR]_[BR], ;(13) Exec/User mismatch
J/PFMAP
=
;Here is how a hard memory error is handled:
BADDATA:
WORK[BADW0]_[BRX] ;Save bad word.
[BRX]_[040000] XWD 0
;;I/O failures come here from J/IOW5 with 200000 in BRX:
HARD: WORK[SV.BR]_[BR] ;Finally save BR
=0 [BR]_VMA, ;VMA for page fail word.
CALL [ABORT] ;Clear page fault condition.
[BR]_[BR].AND.#, ;Save interesting flags:
FORCE USER/1, PHYSICAL/1,
IO CYCLE/1, IO BYTE/1,
ADDRESS HIGH/ALL, HOLD RIGHT
= [BRX]_[BRX].OR.[BR] ;BRX: Page fail word
PAGE FAIL TRAP
;Here is what happens when the initial dispatch on the page fail condition
;tells us an interrupt is pending:
PF-INT: SKIP IRPT ;Timer trap?
=00 [AR]_WORK[TIME1], ;Yes: Get low word.
SPEC/CLRCLK, ; Clear clock flag.
CALL [TOCK] ; Do the update. TOCK returns 2.
CLEANUP AND TRAP ;No: External interrupt. Jump away
ABORT MEM CYCLE ;Clear 1ms flags.
=
.IF/PCST ;Take a PC sample every millisecond
[AR]_WORK[SV.VMA] ;Recover VMA and flags
[ARX]_WORK[PCST], SKIP DP0 ;Skip if PC sampling is enabled
=0 [ARX]_WORK[SV.ARX], J/PAGE-CONTINUE1 ;Disabled or table full
[BR]_PC WITH FLAGS
TL [AR], FETCH/1 ;Skip if PC points at current instruction
=0 [BR]_[BR]-1, HOLD LEFT ;No, back up the PC that gets stored
WORK[PCST]_[ARX]+[XWD1] ;Increment the AOBJN pointer
[ARX] LEFT_0 ;Clear high bits of physical address damn it
VMA_[ARX], VMA PHYSICAL WRITE ;Store PC into sample table
MEM WRITE, MEM_[BR], J/PAGE-CONTINUE
.IFNOT/PCST
[AR]_WORK[SV.VMA], ;Restore VMA and continue where
J/PAGE-CONTINUE ; we left off.
.ENDIF/PCST
;Here we handle a soft page failure. BRX contains VMA FLAGS,,VMA.
PFMAP: ABORT MEM CYCLE ;Clear page fail condition.
TL [BRX], WRITE TEST/1 ;Write test?
=0 [BRX]_[BRX].OR.#, ;Yes: Turn into simple write.
WRITE CYCLE/1, HOLD RIGHT
[BRX]_[BRX].AND.#, ;Save interesting flags:
FORCE USER/1, WRITE CYCLE/1, PHYSICAL/1,
ADDRESS HIGH/MEMORY, HOLD RIGHT
= [AR]_[BRX], ;Copy virtual address and
SC_9. ;prepare to shift 11 places.
=0
PFMAP1: [AR]_[AR]*.5, ;Right adjust page #
STEP SC, J/PFMAP1
[AR]_[AR].AND.# CLR LH, ;AR: index off DBR
#/77
= READ [BRX], SKIP DP0 ;User ref?
=0 READ [BRX], SKIP DP18, ;Exec high ref?
J/EXEC-DBR
READ [BRX], SKIP DP18, ;User high ref?
J/USER-DBR
=
=0
USER-DBR:
[AR]_[AR]+WORK[DBR1], ;User low
J/GOTDBR
[AR]_[AR]+WORK[DBR2], ;User high
J/GOTDBR
=
=0
EXEC-DBR:
[AR]_[AR]+WORK[DBR4], ;Exec low
J/GOTDBR
[AR]_[AR]+WORK[DBR3], ;Exec high
J/GOTDBR
=
;BRX: Original VMA FLAGS,,VMA modified as for a page fail word.
;AR: Address of page table word.
GOTDBR: VMA_[AR], START READ, VMA PHYSICAL
MEM READ, [BR]_MEM
TR [BRX], #/2000 ;Odd?
=0 [ARX]_[BR], ;Yes: entry is in right half, just copy it
J/PTWRH ; into ARX.
[ARX]_[BR] SWAP, ;No: entry is in left half, so copy in ARX
J/PTWLH ; is swapped first.
=
PTWRH: [BR]_[BR].AND.NOT.#, ;BR gets the word to write back with the
PTE AGE/ALL, ; age bits cleared in the right half.
HOLD LEFT,
SKIP DP18, J/PTWTST ;Test 2.9 of entry.
PTWLH: [BR]_[BR].AND.NOT.#, ;BR gets the word to write back with the
PTE AGE/ALL, ; age bits cleared in the left half.
HOLD RIGHT,
SKIP DP0, J/PTWTST ;Test 2.9 of entry.
=0
PTWTST: TR [ARX], #/200000, J/PTWTS0 ;0X: Test 2.8
TR [ARX], #/200000, J/PTWTS1 ;1X: Test 2.8
=
=0
PTWTS0: [BRX]_[BRX].OR.#, ;01: Read only
PAGE ACCESS/1, ;Indicate that in page fail word.
HOLD RIGHT,
J/READ-ONLY
PAGE FAIL TRAP ;00: Not accessible.
=
=0
PTWTS1: [ARX]_[ARX].OR.#, ;11: Read/Write
PTE WRITE/1, ;Set Writable bit in page table.
HOLD LEFT,
J/PAGE-REFILL
[BRX]_[BRX].OR.#, ;10: Read/Write/First
PAGE ACCESS/2, ;Indicate that in page fail word.
HOLD RIGHT,
J/READ-ONLY
=
READ-ONLY:
TL [BRX], ;Were we perhaps trying to write?
WRITE CYCLE/1
=0 PAGE FAIL TRAP ;That would be a problem wouldn't it!
[ARX]_[ARX].AND.NOT.#, ;Clear writable bit in page table.
PTE WRITE/1,
HOLD LEFT,
J/PAGE-REFILL
=
;BRX: Original VMA FLAGS,,VMA modified as for a page fail word.
;AR: Address of page table word.
;ARX: Half formed page table entry in right half.
;BR: Original page table word with the age bit set.
PAGE-REFILL:
VMA_[AR], ;Prepare to put the word back.
START WRITE,
VMA PHYSICAL
MEM WRITE, ;Write it back.
MEM_[BR]
[AR]_WORK[SV.VMA] ;AR: For PAGE-CONTINUE to use.
[BR]_[AR].AND.NOT.#, ;Clear bits which start a cycle.
READ CYCLE/1, WRITE CYCLE/1,
WRITE TEST/1, HOLD RIGHT
[BR]_[AR].AND.NOT.#, ;Make DEC page number even.
#/1000, HOLD LEFT
VMA_[BR], 3T, DP FUNC/1 ;Restore VMA and set User according to
;what it was.
[ARX]_([ARX].OR.#)*2, ;Set Valid bit and shift into position.
3T, PTE VALID/1,
LOAD PAGE TABLE ;Load page table on next instruction.
[ARX]_[ARX].AND.# CLR LH, ;Mask out all but the correct
PT VALID/1, PT WRITE/1, ; bits. Make the DEC physical
PT CACHE/1, PT PAGE/EVEN ; page number even.
[BR]_[BR].OR.#, ;Make DEC page number in VMA odd.
#/1000, HOLD LEFT
VMA_[BR], 3T, DP FUNC/1 ;Restore VMA again for the odd page.
[ARX]_[ARX].OR.#, ;Then the odd physical page.
#/1, HOLD LEFT,
LOAD PAGE TABLE ;Load page table on next instruction.
READ [ARX],
J/PAGE-CONTINUE
;Return to interrupted microinstruction after a successful page table
;reload or a timer trap. AR should contain the right VMA to restart the
;memory cycle.
PAGE-CONTINUE:
[ARX]_WORK[SV.ARX] ;Restore saved stuff
PAGE-CONTINUE1:
[BR]_WORK[SV.BR]
[BRX]_WORK[SV.BRX]
VMA_[AR], ;MAKE MEM REQUEST
DP FUNC/1, 3T, ;FROM DATA PATH
WAIT/1 ;WAIT FOR PREVIOUS CYCLE TO
; COMPLETE. (NEED THIS TO
; START ANOTHER CYCLE)
[AR]_WORK[SV.AR],
RETURN [0]
;;; Here we have hair to back us out of an instruction in case we have to
;;; deliver a page fault or an interrupt. Think of it as micro PCLSRing.
;;; Anybody who comes to this page to deliver a page fault better have set
;;; up BRX to contain the right page fail word first. Cleanup handlers
;;; better not smash it either.
;PAGE FAIL TRAP macro does:
; TL [FLG], FLG.PI/1, ;PI cycle?
; J/PFT
=0
PFT: HALT [IOPF] ;Yes: IO Page Failure
CLEANUP AND TRAP ;No: deliver hard page fault.
=
;CLEANUP AND TRAP macro does:
; [AR]_WORK[SV.VMA],
; SKIP/TRAP CYCLE, ;See if trap cycle.
; J/CLTRP
=0
CLTRP: TL [AR], FETCH/1, ;Is this an instruction fetch?
J/CLTRP1
[AR]_WORK[TRAPPC] ;This is a trap cycle.
= READ [AR], LOAD FLAGS, ;Restore PC flags.
J/CLDISP
=0
.IF/1PROC ;Fault/interrupt while in instruction fetch
CLTRP1: TL [FLG], FLG.2PROC/1, J/CLTRP2
.IFNOT/1PROC
CLTRP1: CLEANUP DONE ;Instruction fetch: Everything is clean.
.ENDIF/1PROC
;;Many things jump here to backup the PC and cleanup.
FIXPC: [PC]_[PC]-1, HOLD LEFT
= ;;Many things jump here to cleanup.
CLDISP: READ [FLG], DBUS/DP, DISP/DP, 3T, J/CLEANUP
;;CLEANUP DISP macro (which nobody uses) does the above.
.IF/1PROC
=0
CLTRP2: TAKE 1-PROCEED TRAP ;Take one-proceed trap instead of this one
CLEANUP DONE
.ENDIF/1PROC
=0000
CLEANUP: ;;Dispatch table to cleanup after a page fault or interrupt.
CLEANED: ;;J/BLT-CLEANUP ;(0) Normal case: No more cleanup needed.
CLEANUP DONE ;Go deliver page fault or interrupt.
=0001 [AR]_WORK[SV.ARX], ;(1) BLT
J/BLT-CLEANUP
;(2) Unused.
=0011 STATE_[EDIT-SRC], ;(3) SRC IN STRING MOVE
J/STRPF
=0100 STATE_[EDIT-DST], ;(4) DST IN STRING MOVE
J/STRPF
=0101 STATE_[SRC], ;(5) SRC+DST IN STRING MOVE
J/BACKD
=0110 STATE_[EDIT-DST], ;(6) FILL IN MOVSRJ
J/STRPF4
=0111 STATE_[EDIT-SRC], ;(7) DEC TO BIN
J/PFDBIN
=1000 STATE_[EDIT-SRC], ;(10) SRC+DST IN COMP
J/CMSDST
=1001 END STATE, J/BACKS ;(11) EDIT SRC FAIL
=1010 END STATE, J/BACKD ;(12) EDIT DST FAIL
=1011 STATE_[EDIT-SRC], ;(13) SRC+DST IN EDIT
J/BACKD
=
;CLEANUP DONE macro does:
; END STATE, SKIP IRPT, J/PFTRAP
=0
PFTRAP: TR [PI], ;Here to deliver page fault after cleanup.
PI.IP1/1, PI.IP2/1, ; This hack figures out what 3 locations to
PI.IP3/1, PI.IP4/1, ; use to deliver the page fault.
J/PFTDSP
TAKE INTERRUPT ;Here to deliver interrupt after cleanup.
; J/PI after setting FLG.PI
=
=0
PFTDSP: TR [PI], PI.IP1/1, PI.IP2/1, J/PFTDS1
TR [PI], PI.IP5/1, PI.IP6/1, J/PFTDS0
=0
PFTDS1: TR [PI], PI.IP1/1, J/PFTD11
TR [PI], PI.IP3/1, J/PFTD10
=0
PFTDS0: TR [PI], PI.IP5/1, J/PFTD01
TR [PI], PI.IP7/1, J/PFTD00
=0
PFTD11: [AR]_0 XWD [443], J/PFTRAP1
[AR]_0 XWD [446], J/PFTRAP1
=0
PFTD10: [AR]_0 XWD [451], J/PFTRAP1
[AR]_0 XWD [454], J/PFTRAP1
=0
PFTD01: [AR]_0 XWD [457], J/PFTRAP1
[AR]_0 XWD [462], J/PFTRAP1
=0
PFTD00: [AR]_0 XWD [465], J/PFTRAP1
[AR]_0 XWD [440], J/PFTRAP1
=
PFTRAP1:
[AR]_[AR]+[EBR], ; Where to store PFW
VMA PHYSICAL WRITE
MEM WRITE, ; Store PFW
MEM_[BRX]
.IF/1PROC
=0** NEXT [AR] PHYSICAL WRITE, ; Where to store old PC
CALL [STORE-INT-PC]
.IFNOT/1PROC
NEXT [AR] PHYSICAL WRITE ; Where to store old PC
[BR]_PC WITH FLAGS ; Get old PC
MEM WRITE, ; Store old PC
MEM_[BR]
.ENDIF/1PROC
[AR]_[AR]+1, ; Where to get new PC
VMA PHYSICAL READ,
J/GOEXEC
.IF/1PROC
STORE-INT-PC:
[BR]_PC WITH FLAGS ; Get old PC
TL [FLG], FLG.1PROC/1 ; Was the instruction being one-proceeded?
=0 [BR]_[BR].OR.#, OIPBIT/1, ;It was, turn pc flag back on
HOLD RIGHT, J/STORE-INT-PC-2
STORE-INT-PC-1:
MEM WRITE, MEM_[BR], RETURN [4]
STORE-INT-PC-2:
[FLG]_[FLG].AND.NOT.#, FLG.1PROC/1, ;Clear 1-proceed flags
FLG.2PROC/1, HOLD RIGHT, J/STORE-INT-PC-1
.ENDIF/1PROC
.ENDIF/ITS

2210
src/kshack/ks10.47 Executable file
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787
src/kshack/pagef.10 Executable file
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@@ -0,0 +1,787 @@
;;;-*-Fundamental-*-
.NOBIN
.TOC "PAGE FAIL REFIL LOGIC"
.IFNOT/ITS
;WHEN THE CPU CAN NOT COMPLETE A MEMORY REFERENCE BECAUSE THE PAGE
; TABLE DOES NOT CONTAIN VALID INFORMATION FOR THE VIRTUAL PAGE INVOLVED
; THE HARDWARE CALLS THIS ROUTINE TO RELOAD THE HARDWARE PAGE TABLE.
;
;THIS CODE WILL EITHER DO THE RELOAD OR GENERATE A PAGE FAIL FOR THE
; SOFTWARE. THE INFORMATION LOADED CONSISTS OF THE PHYSICAL PAGE NUMBER,
; THE CACHE ENABLE BIT AND THE WRITE ENABLE BIT.
;THIS LOGIC USES MANY VARIABLES. THEY ARE DESCRIBED BRIEFLY HERE:
;THING WHERE KEPT USE
;OLD VMA WORKSPACE WORD 210 SAVES VMA
;OLD AR WORKSPACE WORD 211 SAVES AR
;OLD ARX WORKSPACE WORD 212 SAVES ARX
;OLD BR WORKSPACE WORD 213 SAVES BR
;OLD BRX WORKSPACE WORD 214 SAVES BRX
;KL PAGING BIT EBR BIT 1 (IN 2901) INDICATES KL STYLE (TOPS-20) PAGING
; INSTEAD OF KI STYLE (TOPS-10 AND DIAGNOSTIC)
; MODE PAGING
;W BIT FLG BIT 4 PAGE CAN BE WRITTEN
;C BIT FLG BIT 6 DATA IN THIS PAGE MAY BE PUT
; INTO CACHE
;PI CYCLE FLG BIT 5 STORING OLD PC DURING PI
;MAP FLAG FLG BIT 18 MAP INSTRUCTION IN PROGRESS
;CLEANUP CODE FLG BITS 32-35 WHAT TO DO SO INSTRUCTION MAY BE
; RESTARTED
;SPT BASE WORKSPACE WORD 215 ADDRESS OF SHARED-POINTER-TABLE
;CST BASE WORKSPACE WORD 216 ADDRESS OF CORE-STATUS-TABLE
;CST MASK WORKSPACE WORD 217 BITS TO KEEP ON CST UPDATE
;CST DATA (PUR) WORKSPACE WORD 220 BITS TO SET ON CST UPDATE
;PAGE TABLE ADDRESS AR WHERE THIS PAGE TABLE IS LOCATED
;PHYSICAL PAGE # (PPN) AR RESULT OF THIS PROCESS
;CST ENTRY AR CORE STATUS TABLE ENTRY
;SPT ENTRY AR WORD FROM SPT
;PAGE TABLE ENTRY AR WORD FROM PT
;PAGE NUMBER BR INDEX INTO CURENT PAGE TABLE
;PAGE FAIL WORD BRX WHAT HAPPENED (ALSO MAP RESULT)
;
;
;
; KL10 PAGING - WORD FORMATS
;
;Section Pointer
;
;The section pointer is found in the user or exec section table.
;(Part of UPT or EPT.)
;
;Section pointer provides (via the SPT) the physical address of
;the PAGE TABLE for the given section.
;
; Code: 0 No-access (trap)
; 1 Immediate
; 2 Share
; 3 Indirect
; 4-7 Unused, reserved
;
; 0 1 2 3 4 5 6 18 35
; +----+-+-+-+-+---------+-------------------------+
; !CODE!P!W! !C!/////////! PAGE TABLE IDENTIFIER !
; !010 ! ! ! ! !/////////! (SPT INDEX) !
; +----+-+-+-+-+---------+-------------------------+
;
; NORMAL SECTION POINTER (Code = 2)
;
; 0 2 3 4 5 6 9 18 35
; +----+-+-+-+-+---+-----------+------------------------+
; !CODE!P!W! !C!///!SECTION !SECTION TABLE IDENTIFIER!
; !011 ! ! ! ! !///!TABLE INDEX! (SPT INDEX) !
; +----+-+-+-+-+---+-----------+------------------------+
;
; INDIRECT SECTION POINTER (Code = 3)
;PAGE POINTERS
;
;FOUND IN PAGE TABLES
;
; 0 1 2 3 4 5 6 12 35
; +----+-+-+-+-+----+------------------------------+
; !CODE!P!W! !C!////! PHYSICAL ADDRESS OF PAGE !
; !001 ! ! ! ! !////! !
; +----+-+-+-+-+----+------------------------------+
;
; IMMEDIATE POINTER (code field = 1)
;
; B12-35 give PHYSICAL ADDRESS OF PAGE
; if B12-17 >< 0, page not in core-trap
; if B12-17 = 0, B23-35 give CORE PAGE
; NUMBER of page, B18-22 MBZ
;
;
;
;
;
; 0 2 3 6 18 35
; +-----+-------+---------+------------------------+
; !CODE !SAME AS!/////////! SPT INDEX !
; !010 ! IMMED.!/////////! !
; +-----+-------+---------+------------------------+
;
; SHARED POINTER (code field = 2)
;
; B18-35 Give SPT INDEX (SPTX). SPTX + SPT BASE
; ADDRESS = physical core address of word
; holding physical address of page.
; 0 1 2 3 6 9 17 18 35
; +----+--------+---+-------+----------------------+
; !CODE!SAME AS !///! PAGE ! PAGE TABLE IDENTIFIER!
; !011 ! IMMED. !///!NUMBER ! (SPT INDEX) !
; +----+--------+---+-------+----------------------+
;
; INDIRECT POINTER (code field = 3)
;
; This pointer type causes another pointer to be fetched
; and interpreted. The new pointer is found in word N
; (B9-17) of the page addressed by C(SPT + SPTX).
;
;
;
; SPT ENTRY
;
; Found in the SPT, i.e., when fetching C(SPT +SPTX)
;
; 12 35
; +--------------------+---------------------------+
; !////////////////////! PHYSICAL ADDRESS OF PAGE !
; !////////////////////! OR PAGE TABLE !
; +--------------------+---------------------------+
;
; B12-35 Give PHYSICAL ADDRESS of page.
;
; The base address (physical core address) of the SPT
; resides in one AC of the reserved AC block.
;PHYSICAL STORAGE ADDRESS
;
;Found in B12-35 of IMMEDIATE POINTERS and SPT ENTRIES.
;
; 12 17 18 23 35
; +---------+----+-----------------+
; ! !MBZ ! CORE PAGE NUMBER!
; ! ! ! IF B12-17 = 0 !
; +---------+----+-----------------+
;
; If B12-17 = 0, then B23-35 are CORE PAGE NUMBER (i.e.,
; B14-26 of physical core address) of page and B18-22
; MBZ. If B12-17 >< 0, then address is not core and
; pager traps.
;
;
;
;CORE STATUS TABLE ENTRY
;
;Found when fetching C(CBR + CORE PAGENO)
;
; 0 5 32 34 35
; +-------+-------------------------------+------+-+
; ! CODE ! ! !M!
; +-------+-------------------------------+------+-+
;
; B0-5 are code field:
;
; 0 - unavailable, trap
;
; 1-77 - available
;
;
;
; B32-34 reserved for future hardware specification.
;
; B35 is "modified" bit, set on any write ref to page.
;QUANTITIES IN HARDWARE REGISTERS
;
;SPT SPT Base Register
;
; 14 35
; +--------------------------------+
; ! PHYSICAL CORE WORD ADDRESS !
; +--------------------------------+
;
;CBR CST Base Register
;
; 14 35
; +--------------------------------+
; ! PHYSICAL CORE WORD ADDRESS !
; +--------------------------------+
;
;CSTMSK CST Update Mask
;
; 0 32 35
; +------------------------------------------+---+-+
; ! MASK !111!1!
; +------------------------------------------+---+-+
;
; ANDed with CST word during update
;
;(B32-35 must be all 1's to preserve existing CST information)
;
;CSTDATA CST Update Data
;
; 0 32 34 35
; +------------------------------------------+---+-+
; ! DATA !000!0!
; +------------------------------------------+---+-+
;
; IORed with CST word during update
;
;(B32-35 must be all 0's to preserve existing CST information)
;
;All unspecified bits and fields are reserved for future
;specification by DEC.
;
.BIN
.DCODE
257: IOT, AC, J/MAP
.UCODE
1553:
MAP: [AR]_[AR].OR.#, ;ASSUME PHYSICAL REF
#/160000, ;FAKE ANSWER (Set Accessible, Writable,
HOLD RIGHT ;and "Software".)
[BRX]_VMA ;PUT VMA AND FLAGS IN BRX
[BRX]_[BRX].AND.#, ;JUST KEEP USER BIT
#/400000, HOLD RIGHT ; ..
WORK[SV.VMA]_[BRX] ;SAVE IN WORKSPACE
[BR]_WORK[APR] ;GET APR FLAGS
TR [BR], #/030000 ;PAGING ENABLED?
=0 STATE_[MAP], J/PFMAP ;YES--DO REAL MAP
AC_[AR], NEXT INST ;NO--RETURN VIRTUAL ADDRESS
;HARDWARE COMES HERE ON PAGE TABLE NOT VALID (OR INTERRUPT) WHEN
; STARTING A MEMORY REFERENCE. MICOWORD ADDRESS OF INSTRUCTION DOING
; MEM WAIT IS SAVED ON THE STACK.
3777:
PAGE-FAIL:
WORK[SV.AR]_[AR]
ITRAP: WORK[SV.BRX]_[BRX]
[BRX]_VMA
WORK[SV.VMA]_[BRX]
WORK[SV.ARX]_[ARX],
SKIP IRPT ;SEE IF INTERRUPT (SAVE DISPATCH)
=0000
PFD: DBM/PF DISP, DBUS/DBM, ;BRING CODE TO 2901'S
AD/D, DEST/PASS, 4T, ;PUT ON DP 18-21
DISP/DP LEFT, J/PFD ;DISPATCH ON IT
=0001 ;(1) INTERRUPT
WORK[SV.BR]_[BR], J/PFPI1
=0011 ;(3) BAD DATA FROM MEMORY
[BRX]_IO DATA, ;GET THE BAD DATA
AD PARITY OK/0, ; DO NOT LOOK AT PARITY
J/BADDATA ;SAVE IN AC BLK 7
=0101 ;(5) NXM ERROR
[BRX]_[370000] XWD 0, J/HARD
=0111 ;(7) NXM & BAD DATA
[BRX]_[370000] XWD 0, J/HARD
=1000 ;(10) WRITE VIOLATION
WORK[SV.BR]_[BR], J/PFMAP
=1010 ;(12) PAGE NOT VALID
WORK[SV.BR]_[BR], J/PFMAP
=1011 ;(13) EXEC/USER MISMATCH
WORK[SV.BR]_[BR], J/PFMAP
=
BADDATA:
WORK[BADW0]_[BRX] ;SAVE BAD WORD
WORK[BADW1]_[BRX] ;AGAIN
[BRX]_[360000] XWD 0, J/HARD
;WE HAVE SAVED AR, ARX, BR AND BRX. WE MERGE IN HERE FROM MAP
; INSTRUCTION, SAVE THE VMA AND START THE PAGE FAIL WORD.
PFMAP: ABORT MEM CYCLE ;CLEAR PAGE FAIL
[FLG]_[FLG].OR.#, ;PRESET W AND C TO 1
FLG.W/1, FLG.C/1, ;BITS INVOLVED
HOLD RIGHT ;LEAVE RH ALONE
TL [BRX], WRITE TEST/1 ;IS THIS A WRITE TEST?
=0 [BRX]_[BRX].OR.#,
#/10000,
HOLD RIGHT ;YES--TURN INTO WRITE REF
[BRX]_[BRX].AND.#, ;START PAGE FAIL WORD
#/411000, ;SAVE 3 INTERESTING BITS
HOLD RIGHT ;SAVE VIRTUAL ADDRESS
;USER ADDR (400000)
;WRITE REF (010000)
;PAGED REF (001000)
[BRX]_[BRX].XOR.#, ;FIX BIT 8
#/1000, HOLD RIGHT
[BR]_[BRX], ;COPY VIRTUAL ADDRESS
SC_7 ;PREPARE TO SHIFT 9 PLACES
=0
PF25: [BR]_[BR]*.5, ;RIGHT ADJUST PAGE #
STEP SC, ;COUNT SHIFT STEPS
J/PF25 ;LOOP FOR 9
[BR]_[BR].AND.# CLR LH, ;MASK TO 9 BITS
#/777 ; ..
TL [EBR], ;KI MODE REFILL?
#/40 ;FLAG BIT
=0 READ [BRX], ;USER REF? (KL MODE)
SKIP DP0, ; ..
J/PF30 ;CONTINUE AT PF30
[ARX]_[BR]*.5, ;KI10 MODE REFILL
J/KIFILL ;GO HANDLE EASY CASE
;HERE IN TOPS-20 MODE
;PICK UP CORRECT SECTION POINTER
=0
PF30: [ARX]_WORK[PTA.E], ;EXEC MODE
SKIP AD.EQ.0, 4T, ;SEE IF VALID
J/PF35 ;CONTINUE BELOW
[ARX]_WORK[PTA.U], ;USER MODE
SKIP AD.EQ.0, 4T ;SEE IF VALID
=0 VMA_[ARX]+[BR], ;POINTER VALID
VMA PHYSICAL READ, ;START MEMORY
J/PF77 ;CONTINUE BELOW
[AR]_[UBR]+#, 3T, ;USER MODE
#/540, ;OFFSET TO UPT
J/PF40 ;GO GET POINTER
=0
PF35: VMA_[ARX]+[BR], ;POINTER VALID
VMA PHYSICAL READ, ;START MEMORY
J/PF77 ;CONTINUE BELOW
[AR]_[EBR]+#, 3T, ;EXEC MODE
#/540 ;OFFSET TO EPT
PF40: VMA_[AR], ;LOAD THE VMA
START READ, ;START THE MEMORY CRANKING
VMA PHYSICAL ;ABSOLUTE ADDRESS
MEM READ, ;WAIT FOR MEMORY
[AR]_MEM ;POINT POINTER IN AR
;LOOK AT SECTION POINTER AND DISPATCH ON TYPE
=000
PF45: SC_7, ;FETCH SECTION 0 POINTER
CALL [SETPTR] ;FIGURE OUT POINTER TYPE
SECIMM: TL [AR], ;IMMEDIATE POINTER
#/77, ;TEST FOR 12-17 = 0
J/PF50 ;CONTINUE AT PF50
[AR]_[AR]+WORK[SBR], ;SHARED SECTION
J/SECSHR ;GO FETCH POINTER FROM SPT
[AR]_[AR]+WORK[SBR], ;INDIRECT SECTION POINTER
CALL [RDPT] ;GO FETCH SPT ENTRY
=111 TL [AR], ;12 TO 17 = 0?
#/77 ; ..
=
=0 PAGE FAIL TRAP ;NO
[AR]_[AR]*2, ;FIRST SHIFT
STEP SC ;SC WAS LOADED AT PF45
=0*0
PF60: [AR]_[AR]*2, ;CONVERT TO ADDRESS OF
STEP SC, ; SECTION TABLE
J/PF60
CALL [RDPT] ;READ SECTION TABLE
=1*1 J/PF45 ;TRY AGAIN
=
;HERE FOR SHARED SECTION. AR GETS THE ADDRESS OF PAGE TABLE
=0**
SECSHR: CALL [RDPT] ;READ WORD FROM SPT
TL [AR], #/77 ;TEST FOR BITS 12-17 = 0
;HERE WITH ADDRESS OF PAGE TABLE IN AR AND SKIP ON
; BITS 12 THRU 17 EQUAL TO ZERO
=0
PF50: PAGE FAIL TRAP ;BITS 12-17 .NE. 0
[ARX]_[AR].AND.# CLR LH, ;PAGE NUMBER OF PAGE TABLE
#/3777 ;11 BIT PHYSICAL PAGE #
=0* [AR]_[ARX], ;COPY ADDRESS
CALL [UPCST] ;UPDATE CST0
PF70: [AR]_[AR].OR.WORK[PUR] ;PUT IN NEW AGE AND
; USE BITS
=0** START NO TEST WRITE, ;START MEMORY WRITE
CALL [IBPX] ;GO STORE IN MEMORY
SC_7 ;THIS CAN BE BUMMED
=0
PF75: [ARX]_[ARX]*2, ;CONVERT PAGE NUMBER TO
STEP SC, ; PAGE ADDRESS
J/PF75 ;LOOP OVER 9 STEPS
;WE NOW HAVE THE ADDRESS OF THE PAGE TABLE ENTRY. GO
; READ IT AND START ANALYSIS
;IF WE ARE HERE FOR THE FIRST TIME FOR THE USER OR EXEC SAVE THE
; ADDRESS OF THE PAGE TABLE IN PTA.E OR PTA.U SO THAT WE DO NOT
; HAVE TO DO THE SECTION LOOKUP EVERY TIME.
READ [BRX], SKIP DP0 ;USER OR EXEC REF?
=000 [AR]_WORK[PTA.E], ;EXEC MODE
SKIP AD.EQ.0, 4T, ;SEE IF SET YET
CALL [SHDREM] ;SHOULD WE REMEMBER PTR
[AR]_WORK[PTA.U], ;USER MODE
SKIP AD.EQ.0, 4T, ;SEE IF SET YET
CALL [SHDREM] ;SHOULD WE REMEMBER PTR
WORK[PTA.E]_[ARX], ;SAVE FOR EXEC
J/PF76 ;CONTINUE BELOW
WORK[PTA.U]_[ARX], ;SAVE FOR USER
J/PF76 ;CONTINUE BELOW
=111
PF76: VMA_[ARX]+[BR], ;READ PAGE POINTER
START READ,
VMA PHYSICAL
=
=00
PF77: MEM READ, ;START ANALYSIS OF POINTER
[AR]_MEM,
CALL [SETPTR]
PTRIMM: TL [AR], ;IMMEDIATE POINTER
#/77, ;CHECK FOR BITS 0-5
J/PF80 ;GO TO PF80
[AR]_[AR]+WORK[SBR], ;SHARED POINTER
J/PTRSHR ;GO TO READ SPT
;INDIRECT POINTER. CHANGE PAGE # AND LOOK FOR PAGE TABLE
PTRIND: [BR]_[AR] SWAP, ;PUT IN RIGHT HALF
SKIP/-1 MS ;DID CLOCK GO OFF
=0 WORK[SV.AR1]_[AR], ;YES--UPDATE CLOCK
J/PFTICK ; ..
[BR]_[BR].AND.# CLR LH, ;UPDATE PAGE # AND RESTART
#/777, ;MASK FOR PAGE #
SKIP IRPT ;SEE IF THIS IS A LOOP
=0 [AR]_[AR].AND.#, ;CHANGE INDIRECT POINTER
#/277000, ; INTO SHARE POINTER
HOLD RIGHT, ; ..
J/PF45 ;GO BACK AND TRY AGAIN
PAGE FAIL TRAP ;POINTER LOOP
=0**
PTRSHR: CALL [RDPT] ;GO LOOK AT POINTER
TL [AR], ;BITS 12-17 .EQ. 0?
#/77
;HERE WITH FINAL POINTER. SKIP IF 12-17 NOT EQUAL TO ZERO
=00
PF80: PAGE FAIL TRAP ;NO--TAKE A TRAP
[ARX]_[AR].AND.# CLR LH,;SAVE PHYSICAL PAGE #
#/3777, ;MASK TO 13 BITS
CALL [UPCST] ;UPDATE CST0
;HERE WE HAVE CST ENTRY IN AR, PAGE FAIL WORD IN BRX. GO LOOK
; AT WRITABLE AND WRITTEN BITS
=11
PF90: [BRX]_[BRX].OR.#, ;TRANSLATION IS VALID
#/100000, HOLD RIGHT ; ..
TL [FLG], FLG.W/1 ;IS THIS PAGE WRITABLE?
=0 [BRX]_[BRX].OR.#, ;YES--INDICATE THAT IN PFW
#/020000,
J/PF100 ;NOT WRITE VIOLATION
TL [BRX], ;IS THIS A WRITE REF?
WRITE TEST/1, WRITE CYCLE/1
=0 PAGE FAIL TRAP ;WRITE VIOLATION
PF107: [AR]_[AR].OR.WORK[PUR], ;PUT IN NEW AGE
J/PF110 ;GO TO STORE CST ENTRY
=0*
PFTICK: [AR]_WORK[TIME1], ;UPDATE TIMER
SPEC/CLRCLK, CALL [TOCK]
[AR]_WORK[SV.AR1], ;RESTORE AR
J/PTRIND ;GO TRY AGAIN
;HERE IF PAGE IS WRITABLE
PF100: TL [BRX], WRITE CYCLE/1 ;IS THIS A WRITE REF?
=0 [AR]_[AR].OR.#, ;YES--SET WRITTEN BIT
#/1,
HOLD LEFT,
J/PF105
TR [AR], ;NOT WRITE, ALREADY WRITTEN?
#/1
=0
PF105: [BRX]_[BRX].OR.#, ;WRITTEN SET BIT
#/040000, ;MARK PAGE AS
HOLD RIGHT, ;WRITABLE
J/PF107 ;STORE CST WORD
[FLG]_[FLG].AND.NOT.#, ;NOT WRITTEN, CAUSE TRAP ON
FLG.W/1, ; WRITE ATTEMPT
HOLD RIGHT, ;ONLY CLEAR LH
J/PF107
=0**
PF110: START NO TEST WRITE,
CALL [IBPX] ;STORE CST ENTRY
;HERE WHEN WE HAVE FIGURED OUT PHYSICAL ADDRESS (IN ARX) AND FLAGS
; (IN BRX) RELOAD PAGE TABLE.
PFDONE: TR [FLG], ;MAP INSTRUCTION?
#/400000
=0 [AR]_[ARX], ;GET PHYSCIAL PAGE #
SC_7, ;PREPARE TO CONVERT TO
J/PF130 ; WORD ADDRESS
[AR]_WORK[SV.VMA],;RESTORE VMA
J/PF120
=0
PF130: [AR]_[AR]*2, ;CONVERT TO WORD #
STEP SC,
J/PF130
[AR]_[AR].AND.#, ;JUST ADDRESS BITS
#/3,
HOLD RIGHT
END MAP ;CLEAR MAP FLAGS
[BRX]_[BRX].OR.#, ;TURN ON THE TRANSLATION
#/100000, ; VALID BIT
HOLD RIGHT ; IN LEFT HALF ONLY
TL [FLG], FLG.C/1 ;CACHE BIT SET?
=0 [BRX]_[BRX].OR.#, ;YES--SET IN MAP WORD
#/002000, HOLD RIGHT ; ..
[BRX]_[BRX].AND.#, ;PRESERVE WORD #
#/777, HOLD LEFT ; IN PAGE FAIL WORD
[AR]_[AR].OR.[BRX], ;COMPLETE MAP INSTRUCTION
EXIT
PF120: [BR]_[AR] ;COPY PAGE FAIL WORD
[BR]_[AR].AND.NOT.#, ;CLEAR BITS WHICH START A CYCLE
READ CYCLE/1, ; ..
WRITE CYCLE/1, ; ..
WRITE TEST/1, ; ..
HOLD RIGHT ;JUST DO LEFT HALF
VMA_[BR], 3T, ;RESTORE VMA
DP FUNC/1 ;SET USER ACCORDING TO WHAT IT WAS
[ARX]_[ARX].AND.# CLR LH, ;JUST KEEP PAGE #
#/3777 ; ..
[BRX]_[ARX].OR.#, #/400000 ;SET VALID BITS
TL [FLG], FLG.W/1 ;WANT WRITE SET?
=0 [BRX]_[BRX].OR.#, #/040000 ;SET WRITE BIT
TL [FLG], FLG.C/1, ;WANT CACHE SET?
LOAD PAGE TABLE ;LOAD PAGE TABLE ON NEXT
; MICRO INSTRUCTION
=0 [BRX]_[BRX].OR.#, ;SET CACHE BIT
#/020000, J/PF125 ;CACHE BIT
READ [BRX] ;LOAD PAGE TABLE
PF125: [ARX]_WORK[SV.ARX]
[BR]_WORK[SV.BR]
[BRX]_WORK[SV.BRX]
VMA_[AR], ;MAKE MEM REQUEST
DP FUNC/1, 3T, ;FROM DATA PATH
WAIT/1 ;WAIT FOR PREVIOUS CYCLE TO
; COMPLETE. (NEED THIS TO
; START ANOTHER CYCLE)
[AR]_WORK[SV.AR],
RETURN [0]
;SUBROUTINE TO START CST UPDATE
;CALL WITH:
; AR/ PHYSICAL PAGE NUMBER
;RETURN 2 WITH ENTRY IN AR, PAGE FAIL IF AGE TOO SMALL
=0**
UPCST: [AR]_[AR]+WORK[CBR], ;ADDRESS OF CST0 ENTRY
CALL [RDPT] ;READ OLD VALUE
TL [AR], ;0 - 5 = 0?
#/770000 ; ..
=0 [AR]_[AR].AND.WORK[CSTM], ;CLEAR AGE FIELD
RETURN [2] ;AGE IS NOT ZERO
PAGE FAIL TRAP ;AGE TOO SMALL
;SUBROUTINE TO LOOK AT PAGE POINTER
;CALL WITH POINTER IN AR
;RETURNS 1 IF TYPE 1
;RETURNS 2 IF TYPE 2
;RETURNS 3 IF TYPE 3
;GOES TO PFT IF TYPE 0 OR 4 THRU 7
SETPTR: [ARX]_[AR].OR.#, ;AND C AND W BITS
#/753777 ; OF ALL POINTERS
[FLG]_[FLG].AND.[ARX], ; ..
HOLD RIGHT ;KEEP IN LH OF FLG
READ [AR], ;TYPE 4,5,6 OR 7?
SKIP DP0 ; ..
=0 TL [AR], ;HERE WE TEST FOR TYPE
#/300000, ; ZERO POINTER
J/STPTR1 ;CHECK AT STPTR1
PAGE FAIL TRAP ;BAD TYPE
=0
STPTR1: TL [AR], ;NOT ZERO
#/100000, ;SEPERATE TYPE 2
J/STPTR2 ; ..
PAGE FAIL TRAP ;TYPE 0
=0
STPTR2: TL [AR], ;SEPERATE TYPE 1
#/200000, ; AND 3
J/STPTR3 ; ..
RETURN [2] ;TYPE 2
=0
STPTR3: RETURN [3] ;TYPE 3
RETURN [1] ;TYPE 1
;SUBROUTINE TO FETCH A PAGE POINTER OR CST ENTRY
;CALL WITH ADDRESS IN AR
;RETURN 4 WITH WORD IN AR
;
RDPT: VMA_[AR], ;LOAD THE VMA
START READ, ;START MEM CYCLE
VMA PHYSICAL, ;ABSOLUTE ADDRESS
SKIP IRPT ;CHECK FOR INTERRUPTS
=0 MEM READ, ;NO INTERRUPTS
[AR]_MEM, ;PUT THE DATA INTO AR
RETURN [4] ;AND RETURN
PAGE FAIL TRAP ;INTERRUPT
;SUBROUTINE TO SEE IF WE SHOULD REMEMBER AN EXEC SECTION PTR
;CALL WITH SKIP ON ADR.EQ.0
;RETURNS 2 IF WE SHOULD STORE AND 7 IF WE SHOULD NOT
;
=0
SHDREM: RETURN [7] ;INDIRECT PTR
[AR]_.NOT.[FLG] ;FLIP BITS
TL [AR], FLG.W/1, FLG.C/1 ;BOTH BITS SET
=0 RETURN [7] ;NO--DON'T STORE
RETURN [2] ;STORE
;HERE IN KI10 MODE
;BR CONTAINS PAGE # AND ARX CONTAINS PAGE #/2
KIFILL: READ [BRX], ;USER REF?
SKIP DP0 ; ..
=0 [BR]-#, ;EXEC--LESS THAN 340?
#/340, ; ..
SKIP DP18, 4T, ; ..
J/KIF10 ;FOLLOW EXEC PATH
KIUPT: [ARX]_[ARX]+[UBR], ;POINTER TO PAGE MAP ENTRY
LOAD VMA, ;PUT ADDRESS IN VMA
VMA PHYSICAL, ;ABSOLUTE ADDRESS
START READ, ;FETCH UPT WORD
J/KIF30 ;JOIN COMMON CODE
=0
KIF10: [BR]-#, ;EXEC ADDRESS .GE. 340
#/400, ; SEE IF .GT. 400
SKIP DP18, 4T, ; ..
J/KIEPT ;LOOK AT KIF20
[ARX]_[ARX]+#, 3T, ;EXEC ADDRESS .LT. 340
#/600, ;IN EBR+600
J/KIEPT ;JOIN COMMON CODE
=0
KIEPT: [ARX]_[ARX]+[EBR], ;ADD OFFSET TO
LOAD VMA, ; EPT
START READ, ;START FETCH
VMA PHYSICAL, ;ABSOLUTE ADDRESS
J/KIF30 ;GO GET POINTER
[ARX]_[ARX]+#, ;PER PROCESS PAGE
#/220, 3T, ; IS IN UPT + 400
J/KIUPT ;JOIN COMMON CODE
KIF30: MEM READ, ;WAIT FOR DATA
[ARX]_MEM ;PLACE IT IN ARX
TR [BR], ;SEE IF EVEN OR ODD
#/1 ; ..
=0
KIF40: READ [ARX], ;ODD
SKIP DP18, ;SEE IF VALID
J/KIF50 ;JOIN COMMON CODE
[ARX]_[ARX] SWAP, ;EVEN--FLIP AROUND
J/KIF40 ; AND CONTINUE
=0
KIF50: PAGE FAIL TRAP
;AT THIS POINT WE HAVE THE PAGE MAP ENTRY IN RH OF AR
[FLG]_[FLG].AND.NOT.#, ;CLEAR W AND C
FLG.W/1, FLG.C/1 ; FLAGS
TR [ARX], #/020000 ;CACHE ENABLED?
=0 [FLG]_[FLG].OR.#, ;SET CACHE BITS
FLG.C/1, HOLD RIGHT ; ..
TR [ARX], #/040000 ;DO NOT CACHE
;SEE IF CACHE BIT SET
=0 [BRX]_[BRX].OR.#, ;COPY BITS TO BRX
#/020000,
HOLD RIGHT
TR [ARX], ; ..
#/100000
=0 [FLG]_[FLG].OR.#, ;SAVE W
FLG.W/1, ; ..
HOLD RIGHT, ; ..
J/KIF90 ;ALL DONE
TL [BRX], ;W=0, WRITE REF?
WRITE CYCLE/1
=0
KIF80: [BRX]_[BRX].OR.#, ;WRITE FAILURE
#/100000, HOLD RIGHT, ;INDICATE THAT ACCESS WAS ON
J/KIF50 ;GO PAGE FAIL
J/PFDONE ;ALL DONE
KIF90: [BRX]_[BRX].OR.#, ;PAGE IS WRITABLE
#/40000, ;TURN ON IN BRX
J/PFDONE ;ALL SET
;HERE ON HARD PAGE FAILURES
HARD: WORK[SV.BR]_[BR] ;SAVE BR (CLEANUP MAY NEED IT)
=0 [BR]_VMA, ;BUILD PAGE FAIL WORD
CALL [ABORT] ;CLEAR ERROR
[BR]_[BR].AND.#, ;SAVE THE FLAGS
#/401237, ; ..
HOLD RIGHT ; ..
[BRX]_[BRX].OR.[BR], ;COMPLETE PAGE FAIL WORD
J/KIF50 ;GO TRAP
PFPI1: SKIP IRPT ;TIMER TRAP?
=00
[AR]_WORK[TIME1], ;YES--GET LOW WORD
SPEC/CLRCLK, ;CLEAR CLOCK FLAG
CALL [TOCK] ;DO THE UPDATE
J/PFT1 ;EXTERNAL INTERRUPT
ABORT MEM CYCLE ;CLEAR 1MS FLAGS
=
PFPI2: [AR]_WORK[SV.VMA], ;RESTORE VMA
J/PF125
;HERE ON PAGE FAIL TRAP
=0
PFT: HALT [IOPF] ;IO PAGE FAILURE
PFT1: [AR]_WORK[SV.VMA],
SKIP/TRAP CYCLE ;SEE IF TRAP CYCLE
=0 TL [AR], FETCH/1, ;IS THIS AN INSTRUCTION FETCH
J/PFT1A ;GO LOOK BELOW
[AR]_WORK[TRAPPC] ;RESTORE PC
READ [AR], LOAD FLAGS, J/CLDISP
=0
PFT1A: J/CLEANED ;YES--NO PC TO BACK UP
FIXPC: [PC]_[PC]-1, HOLD LEFT ;DATA FAILURE--BACKUP PC
=0
CLDISP: CLEANUP DISP ;GO CLEANUP AFTER PAGE FAIL
=0000
CLEANUP:
CLEANED: ;(0) NORMAL CASE
END STATE, SKIP IRPT, ;NO MORE CLEANUP NEEDED
J/PFT2 ;HANDLE PAGE FAIL OR INTERRUPT
[AR]_WORK[SV.ARX], ;(1) BLT
J/BLT-CLEANUP
[PC]_[PC]+1, ;(2) MAP
J/MAPDON
STATE_[EDIT-SRC], ;(3) SRC IN STRING MOVE
J/STRPF
STATE_[EDIT-DST], ;(4) DST IN STRING MOVE
J/STRPF
STATE_[SRC], ;(5) SRC+DST IN STRING MOVE
J/BACKD
STATE_[EDIT-DST], ;(6) FILL IN MOVSRJ
J/STRPF4
STATE_[EDIT-SRC], ;(7) DEC TO BIN
J/PFDBIN
STATE_[EDIT-SRC], ;(10) SRC+DST IN COMP
J/CMSDST
END STATE, J/BACKS ;(11) EDIT SRC FAIL
END STATE, J/BACKD ;(12) EDIT DST FAIL
STATE_[EDIT-SRC], ;(13) SRC+DST IN EDIT
J/BACKD
=
=0
PFT2: [AR]_[UBR]+#, ;PREPARE TO STORE PFW
#/500, 3T,
J/PFT10
PFT3: TAKE INTERRUPT ;PROCESS INTERRUPT
PFT10: VMA_[AR], ;WHERE TO STORE PFW
VMA PHYSICAL WRITE
=0 MEM WRITE, ;STORE PFW
MEM_[BRX],
CALL [NEXTAR] ;ADVANCE POINTER TO
;PREPARE TO STORE PC
TL [EBR], #/400000 ;KL PAGING?
=0 [BR]_FLAGS,J/EAPF ;YES--DO EXTENDED THING
[BR]_PC WITH FLAGS ;GET OLD PC
MEM WRITE, ;STORE OLD PC
MEM_[BR],
J/EAPF1
MAPDON: END STATE, ;CLEAR MAP BIT
SKIP IRPT ;ANY INTERRUPT?
=0 [AR]_[BRX], ;RETURN PAGE FAIL WORD
EXIT
[PC]_[PC]-1, J/PFT3 ;INTERRUPTED OUT OF MAP
; RETRY INSTRUCTION
=0
EAPF: MEM WRITE, MEM_[BR], ;STORE FLAGS
CALL [NEXTAR] ;STORE PC WORD
MEM WRITE, MEM_[PC] ; ..
EAPF1: [AR]_[AR]+1,
VMA PHYSICAL READ,
J/GOEXEC
NEXTAR: NEXT [AR] PHYSICAL WRITE, RETURN [1]
.ENDIF/ITS

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src/kshack/simple.42 Executable file
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