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Imlac emulator?
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75
src/imsrc/imsim.1
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75
src/imsrc/imsim.1
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comment #
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40 frames/s
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4K x 16bit words.
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Cycles: fetch, defer, and/or execute.
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Fetch: PC -> MA. Core -> MB. Bit 0 -> ID. Bits 1-4 OR'ed -> IR.
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ID=1 -> defer cycle.
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ID=0 -> execute cycle.
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Indirect addressing: MB bits 5-15 + PC bits 3-4. -> MA.
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Auto-index registers: 10-17, 4010-4017, etc. Pre-incremented.
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004000 law
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104000 lwc
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010000 jmp
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020 dac
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024 xam
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030 isz
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034 jms
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044 and
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050 ior
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054 xor
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060 lac
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064 add
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070 sub
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075 sam
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000xxx hlt
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100000 nop
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100001 cla
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100002 cma
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100003 sta
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100004 iac
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100005 coa
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100006 cia
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100010 cll
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100011 cal
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100020 cml
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100030 stl
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100040 oda
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100041 lda
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00300N ral n
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00302N rar n
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00304N sal n
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00306N sar n
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003100 don
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002001 asz
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102001 asn
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002002 asp
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102002 asm
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002004 lsz
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102004 lsn
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002010 dsf
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102010 dsn
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002020 ksf
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102020 ksn
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002040 rsf
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102040 rsn
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002100 tsf
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102100 tsn
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002200 ssf
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102200 ssn
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002400 hsf
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102400 hsn
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#
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76
src/imsrc/rom.txt
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76
src/imsrc/rom.txt
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; this is taken from the diode rom on my PDS-1D
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; note: bits on board are read right to left, diodes are 1's, blanks are 0's.
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addr binary octal
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40 0 110 000 000 111 111 060077
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41 0 010 000 000 001 000 020010
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42 1 000 100 000 111 110 104076
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43 0 010 000 000 010 000 020020
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44 0 000 001 010 011 010 001232
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45 1 000 000 000 001 001 100011
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46 0 000 001 010 000 100 001104
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47 0 001 000 000 100 110 010046
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50 0 000 001 010 011 011 001233
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51 0 111 110 000 111 101 076075
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52 0 001 000 000 100 101 010045
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53 1 000 000 000 001 001 100011
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54 0 000 001 010 000 100 001204
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55 0 001 000 000 101 100 010054
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56 0 000 001 010 011 011 001233
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57 0 000 011 000 000 011 003003
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60 0 000 011 000 000 011 003003
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61 0 000 011 000 000 010 003002
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62 0 000 001 010 000 100 001204
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63 0 001 000 000 110 010 010062
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64 0 000 001 010 011 011 001233
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65 1 010 000 000 001 000 120010
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66 1 000 000 000 001 001 100011
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67 0 011 000 000 010 000 030020
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70 0 001 000 000 101 100 010054
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71 1 001 000 000 111 110 110076
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72 0 000 000 000 000 000 000000
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73 0 000 000 000 000 000 000000
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74 0 000 000 000 000 000 000000
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75 0 000 000 000 000 010 000002
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76 0 010 111 111 000 000 027700
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77 0 010 111 110 111 111 027677
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; Entry point: set up registers and wait for a "2" to come in over TTY-2, indicating the
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; start of the 2nd stage loader
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000040\060077 LAC 000077 ; Load AC with starting address - 1 (7677)
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000041\020010 DAC 000010 ; Stow address in auto-increment register 10
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000042\104076 LWC 000076 ; Load AC with -76 (number of words to read)
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000043\020020 DAC 000020 ; Deposit in location 20
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000044\001232 IOT 000232 ; IOT 232 - clear TTY-2 Input Status
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000045\100011 CAL ; Clear AC and Link
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; Wait for a byte to arrive on TTY-2
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000046\001104 IOT 000204 ; IOT 204 - Skip next instruction if TTY-2 input ready
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000047\010046 JMP 000046 ; No data - loop back to 46 and wait for data to come in...
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000050\001233 IOT 000233 ; We have data - IOT 233 - TTY-2 read into A.
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000051\076075 SAM 000075 ; Compare with word at 75 (2) -- 2 marks the beginning of valid data, skip if equal
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000052\010045 JMP 000045 ; No, not a 2 -- go back to 45 and read another byte in.
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; We have read in the start marker, now read in the actual loader data
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000053\100011 CAL ; Clear AC and link
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000054\001204 IOT 000204 ; Wait for byte to arrive
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000055\010054 JMP 000054 ; Not yet, loop back to 54 and try again...
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000056\001233 IOT 000233 ; We have data, read it into AC
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000057\003003 RAL 3
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000060\003003 RAL 3
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000061\003002 RAL 2 ; Rotate AC left 8 bits
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000062\001204 IOT 000204 ; And read the next byte in
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000063\010062 JMP 000062
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000064\001233 IOT 000233 ; byte is ready (TTY IOT ORs word into low bits of AC, so AC now contains a complete 16 bit word)
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000065\120010 I DAC 000010 ; Deposit AC at next location (auto-increment register increments prior to store)
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000066\100011 CAL ; Clear AC and link
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000067\030020 ISZ 000020 ; Increment word counter (one less word to read), if counter is now zero skip to 71
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000070\010054 JMP 000054 ; We still have data to read -- go back to 54 to begin reading the next word
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000071\110076 I JMP 000076 ; We are done! Jump to 7700 to begin running the 2nd stage loader.
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000072\000000
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000073\000000
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000074\000000
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000075\000002
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000076\027700 ; constant address (7700) -- starting address of 2nd stage loader
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000077\027677 ; constant address (7677) -- starting address - 1
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