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Imlac emulator?

This commit is contained in:
Lars Brinkhoff
2018-10-02 14:11:26 +02:00
parent cc8e6c1964
commit 6411a0cd26
2 changed files with 151 additions and 0 deletions

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comment #
40 frames/s
4K x 16bit words.
Cycles: fetch, defer, and/or execute.
Fetch: PC -> MA. Core -> MB. Bit 0 -> ID. Bits 1-4 OR'ed -> IR.
ID=1 -> defer cycle.
ID=0 -> execute cycle.
Indirect addressing: MB bits 5-15 + PC bits 3-4. -> MA.
Auto-index registers: 10-17, 4010-4017, etc. Pre-incremented.
004000 law
104000 lwc
010000 jmp
020 dac
024 xam
030 isz
034 jms
044 and
050 ior
054 xor
060 lac
064 add
070 sub
075 sam
000xxx hlt
100000 nop
100001 cla
100002 cma
100003 sta
100004 iac
100005 coa
100006 cia
100010 cll
100011 cal
100020 cml
100030 stl
100040 oda
100041 lda
00300N ral n
00302N rar n
00304N sal n
00306N sar n
003100 don
002001 asz
102001 asn
002002 asp
102002 asm
002004 lsz
102004 lsn
002010 dsf
102010 dsn
002020 ksf
102020 ksn
002040 rsf
102040 rsn
002100 tsf
102100 tsn
002200 ssf
102200 ssn
002400 hsf
102400 hsn
#

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; this is taken from the diode rom on my PDS-1D
; note: bits on board are read right to left, diodes are 1's, blanks are 0's.
addr binary octal
40 0 110 000 000 111 111 060077
41 0 010 000 000 001 000 020010
42 1 000 100 000 111 110 104076
43 0 010 000 000 010 000 020020
44 0 000 001 010 011 010 001232
45 1 000 000 000 001 001 100011
46 0 000 001 010 000 100 001104
47 0 001 000 000 100 110 010046
50 0 000 001 010 011 011 001233
51 0 111 110 000 111 101 076075
52 0 001 000 000 100 101 010045
53 1 000 000 000 001 001 100011
54 0 000 001 010 000 100 001204
55 0 001 000 000 101 100 010054
56 0 000 001 010 011 011 001233
57 0 000 011 000 000 011 003003
60 0 000 011 000 000 011 003003
61 0 000 011 000 000 010 003002
62 0 000 001 010 000 100 001204
63 0 001 000 000 110 010 010062
64 0 000 001 010 011 011 001233
65 1 010 000 000 001 000 120010
66 1 000 000 000 001 001 100011
67 0 011 000 000 010 000 030020
70 0 001 000 000 101 100 010054
71 1 001 000 000 111 110 110076
72 0 000 000 000 000 000 000000
73 0 000 000 000 000 000 000000
74 0 000 000 000 000 000 000000
75 0 000 000 000 000 010 000002
76 0 010 111 111 000 000 027700
77 0 010 111 110 111 111 027677
; Entry point: set up registers and wait for a "2" to come in over TTY-2, indicating the
; start of the 2nd stage loader
000040\060077 LAC 000077 ; Load AC with starting address - 1 (7677)
000041\020010 DAC 000010 ; Stow address in auto-increment register 10
000042\104076 LWC 000076 ; Load AC with -76 (number of words to read)
000043\020020 DAC 000020 ; Deposit in location 20
000044\001232 IOT 000232 ; IOT 232 - clear TTY-2 Input Status
000045\100011 CAL ; Clear AC and Link
; Wait for a byte to arrive on TTY-2
000046\001104 IOT 000204 ; IOT 204 - Skip next instruction if TTY-2 input ready
000047\010046 JMP 000046 ; No data - loop back to 46 and wait for data to come in...
000050\001233 IOT 000233 ; We have data - IOT 233 - TTY-2 read into A.
000051\076075 SAM 000075 ; Compare with word at 75 (2) -- 2 marks the beginning of valid data, skip if equal
000052\010045 JMP 000045 ; No, not a 2 -- go back to 45 and read another byte in.
; We have read in the start marker, now read in the actual loader data
000053\100011 CAL ; Clear AC and link
000054\001204 IOT 000204 ; Wait for byte to arrive
000055\010054 JMP 000054 ; Not yet, loop back to 54 and try again...
000056\001233 IOT 000233 ; We have data, read it into AC
000057\003003 RAL 3
000060\003003 RAL 3
000061\003002 RAL 2 ; Rotate AC left 8 bits
000062\001204 IOT 000204 ; And read the next byte in
000063\010062 JMP 000062
000064\001233 IOT 000233 ; byte is ready (TTY IOT ORs word into low bits of AC, so AC now contains a complete 16 bit word)
000065\120010 I DAC 000010 ; Deposit AC at next location (auto-increment register increments prior to store)
000066\100011 CAL ; Clear AC and link
000067\030020 ISZ 000020 ; Increment word counter (one less word to read), if counter is now zero skip to 71
000070\010054 JMP 000054 ; We still have data to read -- go back to 54 to begin reading the next word
000071\110076 I JMP 000076 ; We are done! Jump to 7700 to begin running the 2nd stage loader.
000072\000000
000073\000000
000074\000000
000075\000002
000076\027700 ; constant address (7700) -- starting address of 2nd stage loader
000077\027677 ; constant address (7677) -- starting address - 1