mirror of
https://github.com/PDP-10/its.git
synced 2026-03-20 08:28:43 +00:00
WIP: Make dynamic memory allocation work.
... by turning off the right PI level.
This commit is contained in:
@@ -42,7 +42,7 @@ $$TEMP==1
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DEFSYM %UNVEC==120 ;Interrupt vector
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DEFSYM %UNBAS==3,,774510 ;Base of Unibus register address space
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DEFSYM %UNR0==%UNBAS ;PCSR0
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DEFSYM %UNR0==%UNBAS ;PCSR0 - flags and command
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.BEGIN %UN0 ;Bits in PCSR0
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SERI==1_15. ;status error
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PCEI==1_14. ;port command error
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@@ -56,8 +56,9 @@ DEFSYM %UNR0==%UNBAS ;PCSR0
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INTR==1_7. ;or of bits 15-8
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INTE==1_6. ;interrupt enable
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RSET==1_5. ;reset
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CMD==<.BP 17,0> ;command field - see %UNCMD
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.END %UN0
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.BEGIN %UNCMD ;Command field in PCSR0
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.BEGIN %UNCMD ;Port commands
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NOP==0
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GETPCB==1
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GETCMD==2
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@@ -69,11 +70,22 @@ DEFSYM %UNR0==%UNBAS ;PCSR0
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STOP==17
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.END %UNCMD
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DEFSYM %UNR1==%UNBAS+2 ;PCSR1
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DEFSYM %UNR1==%UNBAS+2 ;PCSR1 - status
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.BEGIN %UN1
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STER==1_15. ;error occurred
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ERROR==<.BP 177_8.,0> ;error code, if STER
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PCTO==1_7. ;Unibus timeout during port command
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ID==<.BP 7_4.,0> ;0 for DEUNA, 1 for DELUA
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STATE==<.BP 17,0> ;functional state
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.END %UN1
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DEFSYM %UNR2==%UNBAS+4 ;PCSR2
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DEFSYM %UNR2==%UNBAS+4 ;PCSR2 - 16 low bits of PCB address
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DEFSYM %UNR3==%UNBAS+6 ;PCSR3
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DEFSYM %UNR3==%UNBAS+6 ;PCSR3 - 16 high bits of PCB address
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.BEGIN %UNPCx ;Port Control Block
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FUNC==<.BP %NE8,0> ;function - see %UNAF
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.END %UNPCx
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.BEGIN %UNAF ;Ancillary function codes in PCB
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NOP==0
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@@ -16,6 +16,10 @@
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;;; along with this program. If not, see <https://www.gnu.org/licenses/>.
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;FIXME The big one - interrupts? Compare with CHAOS...
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; search "PI for Tape" in its.* - TTYCHN
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;PRM p4-3 - BR6/7 "high" vs BR4/5 "low" level - so that's what's being assigned above
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; but which does the DEUNA get?
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; and "CH-11 INTERRUPT ROUTINES" in chaos.* - copy at lower PI level
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;FIXME Should we use input/output queues like IMP does?
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;FIXME Use the style from TCP - this is a bit of a mix at the moment
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;FIXME Use Johnny Eriksson's layout workaround for UBA half-write problem
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@@ -409,34 +413,24 @@ UNADNI: CPOPJ ;Call this after a DNI interrupt
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UNARCB: 0 ;Have we seen an RCBI interrupt?
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;FIXME A flags word would make more sense (if we ever need a second flag!)
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;FIXME For horrible hack below
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BLOCK 2000-<.&1777> ;Align to a page boundary
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UNPGHK: BLOCK 2000*%UNNPG
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BBLK
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;Initialise the DEUNA.
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; Configure and start the DEUNA.
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;
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UNAINI: MOVEI D,%UNNPG-1
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UNAIN1:
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IFN 0,[
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;FIXME This causes the core job to crash later...
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PUSHJ P,TCALL ;Allocate a page of unshuffleable low core
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JRST IOMQ
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BUG HALT,[Couldn't allocate page for DEUNA]
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CONI PI,Q ;Save PI status
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ANDI Q,177
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CONO PI,UTCOFF
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PUSHJ P,IOMQ ;Allocate a page of unshuffleable low core
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BUG HALT,[Couldn't allocate page for DEUNA]
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CONO PI,PICON(Q) ;Restore PI status
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MOVEI B,MUETH ;Tag what it's being used for
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DPB B,[MUR,,MEMBLT(A)]
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LSH A,10. ;Save the pointer
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]
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IFE 0,[
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MOVEI A,2000 ;Use statically-allocated block above
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IMUL A,D
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ADDI A,UNPGHK
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]
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MOVEM A,UNPAGS(D)
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MOVE B,A
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@@ -460,21 +454,24 @@ IFE 0,[
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SOJGE D,UNAIN1
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;Initialisation sequence from DELUA user guide, page 3-8 (42).
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;This needs us to wait for an interrupt in several places, so
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;UNACMD has magic interrupt-continuation behaviour.
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; Initialisation sequence from DELUA user guide, page 3-8 (42).
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; This needs us to wait for an interrupt in several places, so
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; UNACMD has magic interrupt-continuation behaviour.
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;Enable interrupts.
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; Enable interrupts. (This can't be combined with a command.)
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MOVEI A,%UN0"INTE
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IOWRI A,%UNR0
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;Set the PCB address.
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; Set the PCB address.
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HLRZ A,UNPAGU ;Low bits
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IOWRI A,%UNR2
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LSH A,-16. ;High bits
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IOWRI A,%UNR3
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MOVEI A,%UN0"DNI+%UNCMD"GETPCB ;Ack DNI as it's on after reset
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PUSHJ P,UNACMD ;We've really returned to the caller here
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PUSHJ P,UNACMD
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; From now on, we've been called back from UNABRK, so we're operating
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; at TTYCHN level.
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;FIXME put IP address in too, use in ARP above
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;Get the MAC address for ARP to use
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@@ -644,7 +641,6 @@ UNARX1: HRRZ A,W ;Wrap index around
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HLLZS W
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HLRZ J,UNRXRP(W) ;Descriptor
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HRRZ I,UNRXRP(W) ;XXX unibus
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MOVE Q,1(J) ;Is there a packet in this buffer? (OWN=0)
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TLNE Q,%UNTD"OWN
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