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Merge pull request #762 from antmicro/testarch_timing

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[interchange] Update chipdb and python-fpga-interchange versions
This commit is contained in:
gatecat
2021-07-14 17:44:50 +01:00
committed by GitHub
parent 034467ff61 9190bda27d
commit 084e15f9cf
2 changed files with 2 additions and 2 deletions
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2
.github/workflows/interchange_ci.yml vendored
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@@ -114,7 +114,7 @@ jobs:
env:
RAPIDWRIGHT_PATH: ${{ github.workspace }}/RapidWright
PYTHON_INTERCHANGE_PATH: ${{ github.workspace }}/python-fpga-interchange
PYTHON_INTERCHANGE_TAG: v0.0.16
PYTHON_INTERCHANGE_TAG: v0.0.17
PRJOXIDE_REVISION: 1bf30dee9c023c4c66cfc44fd0bc28addd229c89
DEVICE: ${{ matrix.device }}
run: |

2
fpga_interchange/chipdb.h
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@@ -34,7 +34,7 @@ NEXTPNR_NAMESPACE_BEGIN
* kExpectedChipInfoVersion
*/
static constexpr int32_t kExpectedChipInfoVersion = 12;
static constexpr int32_t kExpectedChipInfoVersion = 13;
// Flattened site indexing.
//