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Commit Graph

  • aa8359c73e gowin: BUGFIX: Correctly handle resets YRabbit 2022-12-09 12:55:22 +10:00
  • 0eb53d59d8 Merge pull request #1059 from YosysHQ/gatecat/validity-errors myrtle 2022-12-07 16:19:55 +01:00
  • df99b4ff6c ice40: Add debugs to isBelLocationValid for SB_IO Sean Anderson 2022-10-30 19:21:41 -04:00
  • 603b60da8d api: add explain_invalid option to isBelLocationValid gatecat 2022-12-07 10:27:58 +01:00
  • 519011533a Merge pull request #1058 from YosysHQ/gatecat/bounds-refactor myrtle 2022-12-07 10:26:17 +01:00
  • d1afd6c0f1 heap: Remove custom bounding-box type gatecat 2022-12-07 10:02:16 +01:00
  • e260ac33ab refactor: ArcBounds -> BoundingBox gatecat 2022-12-07 10:00:53 +01:00
  • a342b96bb0 Merge pull request #1055 from yrabbit/pll-pins myrtle 2022-12-06 21:20:59 +01:00
  • 150a482b77 gowin: change the way networks are handled YRabbit 2022-12-06 23:07:01 +10:00
  • cd3b76e3f7 Merge pull request #1056 from YosysHQ/gatecat/generic-fix-consts myrtle 2022-12-06 12:27:03 +01:00
  • 3a61bb4119 viaduct: Fix constant connectivity gatecat 2022-12-06 10:04:59 +01:00
  • e6a8d0f4fc Merge branch 'master' into pll-pins YRabbit 2022-12-04 21:33:36 +10:00
  • db25c5c889 Merge pull request #1054 from YosysHQ/gatecat/api-add-const myrtle 2022-12-04 12:27:53 +01:00
  • 2e68962a02 gowin: add PLL pins processing YRabbit 2022-12-04 15:06:44 +10:00
  • 91454515f4 Unbreak CI gatecat 2022-12-02 14:23:09 +01:00
  • c62a947a28 api: Make NetInfo* of checkPipAvailForNet const gatecat 2022-12-02 14:20:39 +01:00
  • f07d9a1835 Merge pull request #1048 from yrabbit/chipdb-cfg myrtle 2022-12-02 09:58:46 +01:00
  • b0791a01c9 gowin: update the apicula version YRabbit 2022-12-02 08:49:56 +10:00
  • 7638146782 Merge branch 'master' into chipdb-cfg YRabbit 2022-12-02 08:28:51 +10:00
  • 719f89806a Merge pull request #1053 from YosysHQ/gatecat/pbfix myrtle 2022-11-28 09:45:11 +01:00
  • 6ee3daf06a ecp5: Fix Python bindings for pip iterators gatecat 2022-11-28 09:00:41 +01:00
  • ec53ae0c3b gowin: add information about pin configurations YRabbit 2022-11-25 20:49:26 +10:00
  • c61d490bd4 Merge pull request #1045 from yrabbit/unused-ports myrtle 2022-11-20 13:55:01 +01:00
  • 378ca60a2f gowin: mark the PLL ports that are not in use YRabbit 2022-11-20 22:04:09 +10:00
  • c8406b71fe Merge pull request #1042 from yrabbit/add-z1 myrtle 2022-11-12 11:17:06 +01:00
  • d4642d918c gowin: add support for a more common chip YRabbit 2022-11-12 10:12:43 +10:00
  • 1aa9cda77a Merge pull request #1040 from yrabbit/pll-stage0 myrtle 2022-11-11 10:28:19 +01:00
  • 9013b2de50 gowin: use ctx->idf() a bit YRabbit 2022-11-11 09:19:16 +10:00
  • 79cb2f9e20 Merge pull request #1041 from YosysHQ/gatecat/fix-copy-warning myrtle 2022-11-10 15:40:50 +01:00
  • 8a69bd0735 Fix "implicit copy constructor for 'Property' is deprecated" gatecat 2022-11-10 10:57:41 +01:00
  • 6930ab3acd fabulous: Tweak delay estimate gatecat 2022-11-10 10:55:37 +01:00
  • a84ded4793 gowin: add initial PLL support YRabbit 2022-11-10 19:14:41 +10:00
  • ac17c36bec Merge pull request #1037 from YosysHQ/fix_python_ver Miodrag Milanović 2022-10-24 09:45:57 +02:00
  • 4ffa47d897 Fix python version in CI Miodrag Milanovic 2022-10-24 09:42:16 +02:00
  • 010b2e5ecf Update CI script Miodrag Milanovic 2022-10-24 09:28:34 +02:00
  • 445d32497d run clangformat gatecat 2022-10-17 12:35:02 +02:00
  • bd082132ce Merge pull request #1034 from lushaylabs/support-windows-crlf myrtle 2022-10-17 12:33:33 +02:00
  • c2dbaa2b11 Merge pull request #1035 from tyler274/patch-1 myrtle 2022-10-17 10:43:34 +02:00
  • 613d84fb72 Correct Not Equal operator implementation in ice40 Tyler 2022-10-17 01:19:51 -07:00
  • a7acda95f0 support windows line endings Lushay Labs 2022-10-09 23:47:09 +03:00
  • 0d1ea9e6ed Merge pull request #1032 from davidlattimore/registered-output-xform myrtle 2022-10-05 11:07:42 +02:00
  • 1602774d27 nexus: Transform registered output parameters David Lattimore 2022-10-05 14:33:06 +11:00
  • 41709dac8f Merge pull request #1031 from YosysHQ/gatecat/fab-next myrtle 2022-09-30 16:13:32 +02:00
  • 3826a31ad3 fabulous: Pack, validity check and FASM support for muxes gatecat 2022-09-30 13:27:51 +02:00
  • 124c0fc812 fabulous: Add split MUX bels gatecat 2022-09-30 12:03:16 +02:00
  • dc64d32497 router2: further hackery lofty/router2-mod Lofty 2022-09-27 14:59:47 +01:00
  • c44b034fc3 Merge pull request #1030 from YosysHQ/gatecat/ice40-dsp25_10-fix myrtle 2022-09-26 11:48:48 +02:00
  • a16d184956 ice40: Fix handling of carry out route-thru via 25,14 gatecat 2022-09-26 09:33:38 +02:00
  • c9b3c72bff router2: fcroute-based rewrite Lofty 2022-09-24 18:04:46 +01:00
  • f0f9070adb Merge pull request #1029 from airskywater/airskywater-patch-1 myrtle 2022-09-24 10:30:30 +02:00
  • 9572f6f032 Modify code to meet the code style preferences airskywater 2022-09-24 14:46:35 +08:00
  • c702e15a3f Add more sanity check for pointers airskywater 2022-09-24 12:03:44 +08:00
  • 78f67ae5bc fix runtime segmentation fault airskywater 2022-09-24 11:35:40 +08:00
  • a1ad114069 router2: rework heuristics Lofty 2022-09-24 00:17:28 +01:00
  • 04be4bb082 hercules: global buffers lofty/hercules Lofty 2022-09-22 23:25:49 +01:00
  • a50d91e68d rbufx6 clock buffer Lofty 2022-09-19 02:55:29 +01:00
  • f4e6bbd383 Merge pull request #1019 from antmicro/support-clock-relations myrtle 2022-09-20 15:55:43 +02:00
  • 9000c41c4b Added the --ignore-rel-clk option to control timing checks for cross-domain paths, formatted code Maciej Kurc 2022-09-20 12:06:25 +02:00
  • 136ab81cbd Merge pull request #1028 from YosysHQ/gatecat/router2-reserve-src myrtle 2022-09-20 14:37:55 +02:00
  • a920ffcf70 ice40: implement checkPipAvailForNet gatecat 2022-09-20 14:15:10 +02:00
  • 415c097df8 router2: Reserve source wire, too gatecat 2022-09-20 13:42:51 +02:00
  • 5e86806b73 rbufx6 clock buffer Lofty 2022-09-19 02:55:29 +01:00
  • 376cedd558 fabulous: fix, but disable, IO configuration nextpnr-0.4 gatecat 2022-09-16 09:32:15 +02:00
  • a3a641f449 Merge pull request #1026 from YosysHQ/gatecat/ecp5-bitstream-refactor myrtle 2022-09-16 09:16:35 +02:00
  • d58e85f297 Merge pull request #1023 from YosysHQ/gatecat/ice40up-bram-pol myrtle 2022-09-16 06:38:04 +02:00
  • e5da8be4f8 Merge pull request #1025 from YosysHQ/gatecat/nexus-dev-fixes myrtle 2022-09-15 18:03:57 +02:00
  • 1b16453d26 hercules: Viaduct arch for the HME-M7 Lofty 2022-09-15 16:33:52 +01:00
  • 9e272810d8 ecp5: Split bitstream generation into more functions gatecat 2022-09-15 13:28:43 +02:00
  • 7ca3ba3835 nexus: Add ES2 device names and --list-devices gatecat 2022-09-15 12:27:36 +02:00
  • 79aad0988a Merge pull request #1015 from YosysHQ/gatecat/fabulous-viaduct myrtle 2022-09-15 09:07:56 +02:00
  • 3983d4fe53 Merge pull request #1024 from YosysHQ/gatecat/pybind11-bump myrtle 2022-09-15 09:06:35 +02:00
  • a72f898ff4 3rdparty: Bump vendored pybind11 version for py3.11 support gatecat 2022-09-14 09:28:47 +02:00
  • 0a8c411692 ice40: Fix UltraPlus BRAM clock polarity gatecat 2022-09-14 09:24:49 +02:00
  • f423055390 fabulous: Add a viaduct uarch gatecat 2022-08-04 09:04:02 +02:00
  • 1f1bae3e23 Code cleanup Maciej Kurc 2022-08-31 14:31:24 +02:00
  • 60a6e8b070 Added timing check for cross-domain paths for related clocks Maciej Kurc 2022-08-31 14:15:33 +02:00
  • 9a61ad9234 Augmented TimingAnalyser class with detection of clock to clock relations Maciej Kurc 2022-08-30 17:30:58 +02:00
  • 8b6be09809 Fixed port timing classes of DCC ports in the Nexus architecture Maciej Kurc 2022-08-30 17:30:13 +02:00
  • f1349e114f Merge pull request #1018 from yrabbit/bf-0 myrtle 2022-08-25 11:14:50 +02:00
  • e0539f0ed7 gowin: BUGFIX. Really memorize the chip YRabbit 2022-08-25 11:52:29 +10:00
  • 0f4166fedb Merge pull request #1017 from YosysHQ/routerfix myrtle 2022-08-22 13:31:11 +02:00
  • a00b997cf1 add missing overrides Miodrag Milanovic 2022-08-22 12:35:24 +02:00
  • 1aa797b820 Fix parameter order Miodrag Milanovic 2022-08-22 12:32:50 +02:00
  • ccf4367209 Merge pull request #1016 from atsampson/python3 myrtle 2022-08-21 20:53:10 +02:00
  • 19160f10ae Use CMake's Python3 rather than PythonInterp in subdirs Adam Sampson 2022-08-21 17:47:35 +01:00
  • 05167fcb8b pybindings: Mark CellInfo::bel as readonly gatecat 2022-08-18 15:09:41 +02:00
  • 5c93d71c2a Merge pull request #1014 from LAK132/master myrtle 2022-08-18 14:33:26 +02:00
  • ae8966040b Replace deprecated method of finding Python 3 LAK132 2022-08-16 20:14:43 +09:30
  • b9b16eaa53 Merge pull request #1013 from YosysHQ/gatecat/viaduct-args myrtle 2022-08-15 12:41:09 +02:00
  • 47da562600 viaduct: Allow passing command line options to uarch with -o gatecat 2022-08-15 12:15:00 +02:00
  • b653e39991 Merge pull request #1012 from YosysHQ/gatecat/refactor-id-in myrtle 2022-08-11 07:26:20 +01:00
  • c60fb94b6c refactor: Use IdString::in instead of || chains gatecat 2022-08-10 18:58:22 +01:00
  • a20d21bd13 Merge pull request #1011 from YosysHQ/gatecat/nexus-lram-tmg myrtle 2022-08-10 18:26:56 +01:00
  • f7354d092d nexus: Add timing data for LRAM gatecat 2022-08-10 15:47:22 +01:00
  • 66722096ed Merge pull request #1010 from YosysHQ/gatecat/idf myrtle 2022-08-10 11:25:34 +01:00
  • 77c82b0fbf refactor: id(stringf(...)) to new idf(...) helper gatecat 2022-08-10 10:57:17 +01:00
  • 06ce27ed38 Merge pull request #1008 from YosysHQ/gatecat/generic-addbelpin myrtle 2022-08-04 11:48:46 +02:00
  • 37f0886cb9 generic: addBelPin with direction as an arg gatecat 2022-08-04 10:55:19 +02:00
  • 1b54fa2a1c Merge pull request #1004 from yrabbit/fix-muxes myrtle 2022-07-21 11:34:51 +01:00
  • 0285d47138 Merge branch 'master' into fix-muxes YRabbit 2022-07-20 21:14:20 +10:00