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mirror of https://github.com/YosysHQ/nextpnr.git synced 2026-03-01 17:47:39 +00:00

Commit Graph

  • 8e84006ee7 gowin: Himbaechel. Specify the chip variant. YRabbit 2023-09-16 16:17:55 +10:00
  • 682c91476f gowin: Himbaechel. Fix install path YRabbit 2023-09-16 11:39:28 +10:00
  • f5996ff4a1 gowin: Himbaechel. Support DragonFlyBSD YRabbit 2023-09-16 15:01:24 +10:00
  • 8a54e5ec1c gowin: Himbaechel. Support DragonFlyBSD YRabbit 2023-09-16 13:01:53 +10:00
  • 165e89f49a gowin: Himbaechel. Support DragonFlyBSD YRabbit 2023-09-16 11:43:13 +10:00
  • 565927dfcc himbaechel: Add discovery of uarch and chipdb gatecat 2023-09-12 17:29:26 +02:00
  • 3cac90a30a himbaechel: Fix for Python 3.9 gatecat 2023-09-12 09:24:20 +02:00
  • 3e1e783873 himbaechel: Initial timing support gatecat 2023-08-25 12:04:39 +02:00
  • 890d7f7617 gowin: Himbaechel. Use a more appropriate function YRabbit 2023-09-07 19:04:42 +10:00
  • 78ee20b5da gowin: Himbaechel. Extend clock router YRabbit 2023-09-04 22:20:08 +10:00
  • f9825c3130 ice40: only set/clear negclk bit if IO clock actually used gatecat 2023-09-07 11:01:56 +02:00
  • eef5243fba himbaechel/gowin: recognize -DAPYCULA_INSTALL_PREFIX=.../virtualenv. Catherine 2023-08-31 17:52:05 +00:00
  • 732b329e7d himbaechel/gowin: recognize -DHIMBAECHEL_GOWIN_DEVICES=all. Catherine 2023-08-31 17:50:45 +00:00
  • 9994ba1d19 json: Fix handling of offsets in backend gatecat 2023-09-04 15:49:07 +02:00
  • 83ad4a9f17 mistral: fix horrific wire hashing performance lofty/mistral-update Lofty 2023-09-02 11:30:35 +01:00
  • 1f8e8948ea mistral: update mistral to ef6263f Lofty 2023-09-02 11:01:36 +01:00
  • 79c6840fef ecp5: Improve packer robustness to FF dangling M input gatecat 2023-09-01 14:54:27 +02:00
  • 5b99b99859 mistral: update to mistral dc82215 Lofty 2023-09-02 10:12:54 +01:00
  • a9a9251e42 clangformat gatecat 2023-08-31 10:30:19 +02:00
  • 98b09c369f gowin: Himbaechel. Fix the device selection YRabbit 2023-08-31 17:12:04 +10:00
  • 3e0b9826b5 gowin: Himbaechel. Fix problems. YRabbit 2023-08-25 18:40:29 +10:00
  • aca14cc420 gowin: Himbaechel. Install bases YRabbit 2023-08-23 14:58:58 +10:00
  • 6513299126 gowin: Himbaechel. Handling of disabled units YRabbit 2023-08-21 19:52:38 +10:00
  • f42805984c gowin: Himbaechel. Improve CMake thing a little YRabbit 2023-08-20 07:32:30 +10:00
  • fdd45d12fd gowin: Himbaechel. Add rough CMake stuff YRabbit 2023-08-20 04:05:35 +10:00
  • 1b926b2703 gowin: Himbaechel. Fix IO for GW1NZ-1 YRabbit 2023-08-19 17:49:25 +10:00
  • 84a27c3ebf gowin: Himbaechel. Improve error messages YRabbit 2023-08-18 09:33:05 +10:00
  • 09b7cad7f1 gowin: Himbaechel. Refactor. YRabbit 2023-08-18 06:40:31 +10:00
  • e85bb1c28c gowin: Himbaechel. Fix DESER and PLL YRabbit 2023-08-17 21:58:36 +10:00
  • 4d0afdfd60 gowin: Himbaechel. Add the GW1N-4 simple IOs YRabbit 2023-08-15 13:14:29 +10:00
  • 0994e11b73 gowin: Himbaechel. Add OSER16 and IDES16 YRabbit 2023-08-13 22:05:18 +10:00
  • a823543932 gowin: Himbaechel. Unify the creation of tail types YRabbit 2023-08-12 15:12:19 +10:00
  • 87ae77fbc6 gowin: Himbaechel. Add IDES primitives YRabbit 2023-08-10 21:24:30 +10:00
  • 3a073540c2 gowin: Himbaechel. Add OSER10 and OVIDEO YRabbit 2023-08-08 10:57:45 +10:00
  • dfb701b5ab gowin: Himbaechel. Add OSER8 YRabbit 2023-08-07 18:20:08 +10:00
  • 5e9a96d358 gowin: Himbaechel. Add SERDES and differential IO YRabbit 2023-08-06 20:56:08 +10:00
  • 01044cc910 gowin: Himbaechel. Add redundant checks YRabbit 2023-07-27 17:28:58 +10:00
  • 03c413a27a gowin: Himbaechel. Add simplified IO YRabbit 2023-07-25 13:25:33 +10:00
  • df13104384 gowin: Himbaechel. Add extra chip data YRabbit 2023-07-23 16:46:04 +10:00
  • 49f8620ac9 gowin: Himbaechel. Implement PLLs YRabbit 2023-07-22 10:01:35 +10:00
  • 6eeac1cabf gowin: Himbaechel. Use pin functions info YRabbit 2023-07-20 12:09:14 +10:00
  • b2ec06dfe8 gowin: Himbaechel. Implement the GSR primitive YRabbit 2023-07-19 13:29:18 +10:00
  • 6cac19c055 gowin: Himbaechel. Add constraint file processing. YRabbit 2023-07-14 18:57:20 +10:00
  • 3d3039e25c gowin: Himbaechel. Add bundle data generation. YRabbit 2023-07-12 19:36:03 +10:00
  • 2930d80627 gowin: Himbaechel. Add a clock router. YRabbit 2023-07-12 11:25:28 +10:00
  • c4b3268e90 gowin: Himbaechel. Add the LUTRAM YRabbit 2023-07-06 14:48:44 +10:00
  • c9b23a01db gowin: Himbaechel. Add ALU. YRabbit 2023-07-05 12:49:25 +10:00
  • c82654d003 gowin: Himbaechel. Add a wideluts YRabbit 2023-07-02 16:09:39 +10:00
  • f7fbe0db04 gowin: Himbaechel, fix style YRabbit 2023-07-01 19:09:27 +10:00
  • e4d2e1bd85 gowin: add support for all DFF types YRabbit 2023-06-30 22:44:19 +10:00
  • ae89430075 gowin: add global VCC and VSS networks YRabbit 2023-06-30 17:18:14 +10:00
  • fb5f764b85 gowin: Add himbaechel arch YRabbit 2023-06-29 06:50:16 +10:00
  • 24e1734999 generate bba YRabbit 2023-06-28 16:32:53 +10:00
  • bc7cd4f20e wip start YRabbit 2023-06-28 10:16:29 +10:00
  • b9592093b5 Update examples to synth_lattice Miodrag Milanovic 2023-08-30 15:28:05 +02:00
  • 5497a37de1 VLO,VHI support for ECP5 Miodrag Milanovic 2023-08-29 09:38:06 +02:00
  • 688f1ba983 widelut support for xo2/xo3/xo3d Miodrag Milanovic 2023-08-28 15:05:04 +02:00
  • e08471dfaf router2: Improve robustness when critical nets conflict gatecat 2023-08-24 08:55:53 +02:00
  • 977180524a nexus: More DPHY clock ports that require general routing hop gatecat 2023-08-23 11:00:49 +02:00
  • a01e2c9068 nexus: Be robust to parameters shorter than expected gatecat 2023-08-23 10:46:46 +02:00
  • 053dfc98f0 use std::numeric_limits instead of macros rowanG077 2023-06-28 09:06:22 +02:00
  • 1fdd683344 Do not use C++20 struct initilisation rowanG077 2023-06-25 08:57:48 +02:00
  • 240f89081f Add back error/warning for combinational loops rowanG077 2023-06-23 14:14:12 +02:00
  • d2a489d5e9 Remove old timing analyser rowanG077 2023-06-22 15:18:57 +02:00
  • b0820eeaaa Formatting and display async path in json report rowanG077 2023-06-21 18:09:38 +02:00
  • cfd3a52a3c tmg: add timing_report rowanG077 2023-06-16 13:20:36 +02:00
  • 596873c302 tmg: Add net_timings, crit path and slack hist rowanG077 2023-06-01 18:00:35 +02:00
  • 8b51674a6b Add critical path report to modern timing engine rowanG077 2023-05-25 23:03:16 +02:00
  • d9f009b570 Split timing into old and new code rowanG077 2023-05-11 11:10:50 +02:00
  • 88714c54ec ecp5: Fix TQFP144 package import gatecat 2023-08-17 11:42:29 +02:00
  • 053d89570f Use type name directly Miodrag Milanovic 2023-05-26 13:13:41 +02:00
  • adacaf65f4 additional new constants Miodrag Milanovic 2023-05-25 15:27:02 +02:00
  • 83f65169a3 different oscilator for XO3D Miodrag Milanovic 2023-05-25 14:28:15 +02:00
  • 679b662a2b Added a code of conduct, which was taken from the YosysHQ/yosys repo Aki Van Ness 2023-08-08 07:43:48 -07:00
  • 54b2045726 clangformat gatecat 2023-06-20 10:58:18 +02:00
  • 914999673c Rip out budgets rowanG077 2023-05-11 11:23:32 +02:00
  • 77afaf23a5 gowin: use the correct version of apicula YRabbit 2023-06-20 05:13:29 +10:00
  • 1260f2f7d7 gowin: Add support for GW2A series chips YRabbit 2023-06-17 20:31:04 +10:00
  • cbd6496d35 router2: fix 8935c186 (again) Lofty 2023-06-19 11:19:42 +01:00
  • 6c0b4443d5 Removes unnecessary argument Meinhard Kissich 2023-06-15 20:38:37 +02:00
  • bbe9ea9d65 gowin: fixes default networks Meinhard Kissich 2023-06-15 19:49:48 +02:00
  • 787fac7649 router2: fix 8935c186 Lofty 2023-06-14 03:19:42 +01:00
  • 71a6b99633 router2: revisit nodes with lower delay Lofty 2023-06-13 01:06:48 +01:00
  • 8935c1867f router2: revisit nodes with lower cost Lofty 2023-06-13 00:47:07 +01:00
  • 863ad4cee8 Add .cache used by clangd to gitignore rowanG077 2023-06-07 17:18:56 +02:00
  • 68a2b2710f Add nix shell rowanG077 2023-06-07 17:17:44 +02:00
  • 8a79a3522c build: Flatten include dirs when building comp db rowanG077 2023-06-07 17:12:17 +02:00
  • cb4846a58d build: push INSTALL_PREFIX from env to cmake var rowanG077 2023-06-07 17:11:39 +02:00
  • 0f947ee693 Timing: Fix combinational paths through all ports (#1175) Rowan Goemans 2023-06-12 10:25:01 +02:00
  • 5b958c4d80 Analyse async paths in TimingAnalyser (#1171) Rowan Goemans 2023-06-09 08:01:47 +02:00
  • 3e739fd5f9 mistral: LD-aware TD checking lofty/better-alm-packing Lofty 2023-06-08 06:40:08 +01:00
  • ff094becab mistral: improve ALM packing in LABs Lofty 2023-06-05 02:49:53 +01:00
  • f47ec47143 mistral: count number of LABs in use Lofty 2023-06-05 02:49:14 +01:00
  • 119b47acf3 mistral: add 8x40-bit M10K addressing mode Lofty 2023-05-29 05:39:28 +01:00
  • c5666c47fe mistral: fix corner cases related to 13x1-bit M10Ks Lofty 2023-05-29 01:36:05 +01:00
  • e5a5de53c1 mistral: fallback to guess if simulator has no waveform Lofty 2023-05-25 17:53:45 +01:00
  • 5936464967 router2: add alternate weight option (#1162) Lofty 2023-05-25 09:47:10 +01:00
  • 7912a61ce3 mistral: rework delay estimate (#1161) Lofty 2023-05-22 12:01:20 +01:00
  • ccf9d00d82 ArchDevice struct and use c++ string compare micko/ecp5_update Miodrag Milanovic 2023-05-22 10:39:41 +02:00
  • 7dafd4da58 mistral: Fix uninitialised comb_out for plain LUTs gatecat 2023-05-22 09:44:38 +02:00