YRabbit 6a1212a1e1 gowin: Add PLL support for the GW1NR-9 chip ...

And also unified the fixing of PLL to bels: the point is that PLL being
at a certain location has the possibility to use a direct implicit wire
to the clock source, but once we decide to use this direct wire, the PLL
can no longer be moved.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>

2023-01-30 12:49:57 +10:00

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