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Clifford Wolf cdb31fdafc Use singular in type names (BelRange, WireIterator) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-02 12:57:19 +02:00
common
Add DelayInfo struct
2018-05-29 20:04:29 +02:00
dummy
Add DelayInfo struct
2018-05-29 20:04:29 +02:00
ice40
Use singular in type names (BelRange, WireIterator)
2018-06-02 12:57:19 +02:00
.gitignore
Start work on iCE40 chipdb
2018-05-26 14:27:28 +02:00
Makefile
Start work on iCE40 chipdb
2018-05-26 14:27:28 +02:00
Description
nextpnr portable FPGA place and route tool
30 MiB
Languages
C++ 83%
Python 6%
Verilog 3.9%
C 3.7%
Assembly 1.5%
Other 1.8%