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Missing an '&'

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This commit is contained in:
Eddie Hung
2019-09-26 11:13:08 -07:00
parent a009314597
commit 143f82def2
1 changed files with 1 additions and 1 deletions
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techlibs/xilinx/synth_xilinx.cc
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@@ -244,7 +244,7 @@ struct SynthXilinxPass : public ScriptPass
}
extra_args(args, argidx, design);
if (family != "xcup" && family != "xcu" && family != "xc7" && family != "xc6v" & family != "xc6s")
if (family != "xcup" && family != "xcu" && family != "xc7" && family != "xc6v" && family != "xc6s")
log_cmd_error("Invalid Xilinx -family setting: '%s'.\n", family.c_str());
if (widemux != 0 && widemux < 2)