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mirror of synced 2026-04-30 21:50:07 +00:00

Merge pull request #907 from YosysHQ/clifford/fix906

Build Verilog parser with -DYYMAXDEPTH=100000
This commit is contained in:
Clifford Wolf
2019-03-30 00:09:42 +01:00
committed by GitHub

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@@ -14,6 +14,8 @@ frontends/verilog/verilog_lexer.cc: frontends/verilog/verilog_lexer.l
$(Q) mkdir -p $(dir $@)
$(P) flex -o frontends/verilog/verilog_lexer.cc $<
frontends/verilog/verilog_parser.tab.o: CXXFLAGS += -DYYMAXDEPTH=100000
OBJS += frontends/verilog/verilog_parser.tab.o
OBJS += frontends/verilog/verilog_lexer.o
OBJS += frontends/verilog/preproc.o