github.com/YosysHQ.yosys
1
0
Fork 0
mirror of synced 2026-03-10 20:54:30 +00:00
Code Issues Releases Wiki Activity

ice40: fix ICESTORM_LC process sensitivity

Browse Source
This commit is contained in:
Eddie Hung
2020-05-12 15:40:48 -07:00
parent 4ecae8a673
commit 27b7ffc754
1 changed files with 1 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
techlibs/ice40/cells_sim.v
View File

@@ -1908,7 +1908,7 @@ module ICESTORM_LC (
o_reg <= SR_pd ? SET_NORESET : lut_o;
reg o_reg_async = 1'b0;
always @(posedge polarized_clk, posedge SR)
always @(posedge polarized_clk, posedge SR_pd)
if (SR_pd)
o_reg_async <= SET_NORESET;
else if (CEN_pu)