github.com/YosysHQ.yosys
1
0
Fork 0
mirror of synced 2026-02-20 14:45:06 +00:00
Code Issues Releases Wiki Activity

Removed VIN_BUF_EN

Browse Source
This commit is contained in:
Andrew Zonenberg
2016-04-24 17:01:21 -07:00
parent 6e215f374d
commit 349d717202
1 changed files with 0 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
techlibs/greenpak4/cells_sim.v
View File

@@ -16,7 +16,6 @@ endmodule
module GP_ACMP(input wire PWREN, input wire VIN, input wire VREF, output reg OUT);
parameter BANDWIDTH = "HIGH";
parameter VIN_BUF_EN = 0;
parameter VIN_ATTEN = 1;
parameter VIN_ISRC_EN = 0;
parameter HYSTERESIS = 0;