make note that it is for latch mode

2026-04-25 03:46:21 +00:00 · 2019-09-18 17:48:16 +02:00
parent b0ca6de472
commit 3e9449cb0b
1 changed files with 1 additions and 0 deletions
--- a/techlibs/anlogic/cells_sim.v
+++ b/techlibs/anlogic/cells_sim.v
@@ -55,6 +55,7 @@ module AL_MAP_SEQ (
 		end
 		else
 		begin
+			// DFFMODE == "LATCH"
 			if (SRMODE == "ASYNC") 
 			begin
 				always @(clk_ce, srmux)