github.com/YosysHQ.yosys
1
0
Fork 0
mirror of synced 2026-04-26 12:18:43 +00:00
Code Issues Releases Wiki Activity

int -> bool

Browse Source
This commit is contained in:
Robert Baruch
2021-02-21 20:00:31 -08:00
committed by Marcelina Kościelnicka
parent 7c50b89b24
commit 4b31223e60
1 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
kernel/rtlil.h
View File

@@ -735,7 +735,7 @@ struct RTLIL::SigChunk
RTLIL::SigChunk extract(int offset, int length) const;
inline int size() const { return width; }
inline int is_wire() const { return wire != NULL; }
inline bool is_wire() const { return wire != NULL; }
bool operator <(const RTLIL::SigChunk &other) const;
bool operator ==(const RTLIL::SigChunk &other) const;
@@ -761,7 +761,7 @@ struct RTLIL::SigBit
SigBit(const RTLIL::SigBit &sigbit) = default;
RTLIL::SigBit &operator =(const RTLIL::SigBit &other) = default;
inline int is_wire() const { return wire != NULL; }
inline bool is_wire() const { return wire != NULL; }
bool operator <(const RTLIL::SigBit &other) const;
bool operator ==(const RTLIL::SigBit &other) const;