Bugfix in dff2dffe
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@@ -173,7 +173,7 @@ struct Dff2dffeWorker
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return or_input;
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RTLIL::SigSpec y = module->addWire(NEW_ID);
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RTLIL::Cell *c = module->addReduceOr(NEW_ID, or_input, y);
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RTLIL::Cell *c = module->addReduceAnd(NEW_ID, or_input, y);
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if (make_gates) {
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simplemap(module, c);
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