Merge pull request #3984 from YosysHQ/module_hdlname

verific: save original module name

frontends/verific/verific.cc

@@ -1275,6 +1275,7 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::ma
 		log("Importing module %s.\n", RTLIL::id2cstr(module->name));
 	}
 	import_attributes(module->attributes, nl, nl);
+	module->set_string_attribute(ID::hdlname, nl->CellBaseName());
 	const char *param_name ;
 	const char *param_value ;
 	MapIter mi;