github.com/YosysHQ.yosys
1
0
Fork 0
mirror of synced 2026-04-26 12:18:43 +00:00
Code Issues Releases Wiki Activity

Run dffsr2dff in synth_xilinx

Browse Source
This commit is contained in:
Clifford Wolf
2016-02-13 08:20:19 +01:00
parent 7bd329afa0
commit a75f94ec4a
1 changed files with 2 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
techlibs/xilinx/synth_xilinx.cc
View File

@@ -91,6 +91,7 @@ struct SynthXilinxPass : public Pass {
log(" fine:\n");
log(" opt -fast -full\n");
log(" memory_map\n");
log(" dffsr2dff\n");
log(" dff2dffe\n");
log(" opt -full\n");
log(" techmap -map +/techmap.v -map +/xilinx/arith_map.v\n");
@@ -196,6 +197,7 @@ struct SynthXilinxPass : public Pass {
{
Pass::call(design, "opt -fast -full");
Pass::call(design, "memory_map");
Pass::call(design, "dffsr2dff");
Pass::call(design, "dff2dffe");
Pass::call(design, "opt -full");
Pass::call(design, "techmap -map +/techmap.v -map +/xilinx/arith_map.v");