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analogdevices: LUT RAM only on positive edge

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Lofty
2025-10-18 12:11:18 +01:00
parent 00f4e8ae22
commit c6cce2d6e5
1 changed files with 1 additions and 1 deletions
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techlibs/analogdevices/lutrams.txt
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@@ -13,7 +13,7 @@ ram distributed $__ANALOGDEVICES_LUTRAM_SP_ {
init no_undef;
prune_rom;
port arsw "RW" {
clock anyedge;
clock posedge;
}
}