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LX -> LP

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This commit is contained in:
Eddie Hung
2019-08-28 18:51:14 -07:00
parent 5c42455350
commit e3709e5ee6
1 changed files with 1 additions and 1 deletions
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techlibs/ice40/cells_sim.v
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@@ -3,7 +3,7 @@
// `define SB_DFF_REG reg Q
`define ABC_ARRIVAL_HX(TIME) `ifdef ICE40_HX (* abc_arrival=TIME *) `endif
`define ABC_ARRIVAL_LX(TIME) `ifdef ICE40_LX (* abc_arrival=TIME *) `endif
`define ABC_ARRIVAL_LP(TIME) `ifdef ICE40_LP (* abc_arrival=TIME *) `endif
`define ABC_ARRIVAL_U(TIME) `ifdef ICE40_U (* abc_arrival=TIME *) `endif
// SiliconBlue IO Cells