github.com/YosysHQ.yosys
1
0
Fork 0
mirror of synced 2026-04-28 04:56:37 +00:00
Code Issues Releases Wiki Activity
9,901 Commits 131 Branches 66 Tags
2a59cd9ed0c6d4ddf19fc735682fa236018bcf2c
Commit Graph

1 Commits

Author SHA1 Message Date
Marcin Kościelnicki
7e0e42f907 xilinx: Add simulation model for DSP48 (Virtex 4). 2020-01-29 01:40:00 +01:00