YosysHQ.yosys

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Commit Graph

Author	SHA1	Message	Date
Krystine Sherwin	a33b1b6059	More work on example_synth Added highlighting in (most) schematics. Written down to end of coarse-grain, with a couple of TODOs for filling in gaps. Includes `techmap_synth.rst` stub.	2023-12-18 17:49:15 +13:00
Krystine Sherwin	742ec78ca3	Switching example synth to fifo Fifo code based on SBY quick start. Instead of showing the full design we are (currently) focusing on a single output (rdata), using `%ci*` to get the subcircuit it relies on.	2023-12-18 13:19:01 +13:00

Author

SHA1

Message

Date

Krystine Sherwin

a33b1b6059

More work on example_synth

Added highlighting in (most) schematics.
Written down to end of coarse-grain, with a couple of TODOs for filling in gaps.
Includes `techmap_synth.rst` stub.

2023-12-18 17:49:15 +13:00

Krystine Sherwin

742ec78ca3

Switching example synth to fifo

Fifo code based on SBY quick start.
Instead of showing the full design we are (currently) focusing on a single output (rdata), using `%ci*` to get the subcircuit it relies on.

2023-12-18 13:19:01 +13:00

2 Commits