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Mono Color

• 7f3dc86ecd Added RTLIL::SigSpec move constructor and move assignment operator Clifford Wolf 2014-07-27 02:11:57 +02:00
• c91570bde3 Mostly cosmetic changes to rtlil.h Clifford Wolf 2014-07-27 02:00:04 +02:00
• 4c4b602156 Refactoring: Renamed RTLIL::Module::cells to cells_ Clifford Wolf 2014-07-27 01:51:45 +02:00
• f9946232ad Refactoring: Renamed RTLIL::Module::wires to wires_ Clifford Wolf 2014-07-27 01:49:51 +02:00
• d7916a49af New message for completion of build Clifford Wolf 2014-07-26 21:34:19 +02:00
• d68c993ed2 Changed more code to the new RTLIL::Wire constructors Clifford Wolf 2014-07-26 21:16:05 +02:00
• 946ddff9ce Changed a lot of code to the new RTLIL::Wire constructors Clifford Wolf 2014-07-26 20:12:50 +02:00
• d49dec1f86 Added tests/various/.gitignore Clifford Wolf 2014-07-26 17:43:41 +02:00
• b21ebe1859 Added tests/various/submod_extract.ys Clifford Wolf 2014-07-26 17:22:18 +02:00
• 267c615640 Added support for here documents Clifford Wolf 2014-07-26 17:21:40 +02:00
• 3f4e3ca8ad More RTLIL::Cell API usage cleanups Clifford Wolf 2014-07-26 16:14:02 +02:00
• 97a59851a6 Added RTLIL::Cell::has(portname) Clifford Wolf 2014-07-26 16:11:28 +02:00
• a84cb04935 Merge automatic and manual code changes for new cell connections API Clifford Wolf 2014-07-26 16:00:30 +02:00
• f8fdc47d33 Manual fixes for new cell connections API Clifford Wolf 2014-07-26 15:57:57 +02:00
• b7dda72302 Changed users of cell->connections_ to the new API (sed command) Clifford Wolf 2014-07-26 14:32:50 +02:00
• cd6574ecf6 Added some missing "const" in rtlil.h Clifford Wolf 2014-07-26 15:57:27 +02:00
• 7ac9dc7f6e Added RTLIL::Module::connections() Clifford Wolf 2014-07-26 14:38:33 +02:00
• b03aec6e32 Added RTLIL::Module::connect(const RTLIL::SigSig&) Clifford Wolf 2014-07-26 14:31:47 +02:00
• 027819c7e8 Use "wget -N" in tests/vloghtb/run-test.sh Clifford Wolf 2014-07-26 14:08:43 +02:00
• b90f443338 Added "passed" message to make test targets Clifford Wolf 2014-07-26 14:08:20 +02:00
• 3719281ed4 Automatically pack SigSpec on copy/assign Clifford Wolf 2014-07-26 13:59:30 +02:00
• e75e495c2b Added new RTLIL::Cell port access methods Clifford Wolf 2014-07-26 12:22:58 +02:00
• cc4f10883b Renamed RTLIL::{Module,Cell}::connections to connections_ Clifford Wolf 2014-07-26 11:58:03 +02:00
• 665759fcee Cosmetic fixes for "make abc" Clifford Wolf 2014-07-26 11:55:58 +02:00
• f8a68b8f55 Added "Checklist for adding internal cell types" Clifford Wolf 2014-07-26 11:23:43 +02:00
• 4755e14e7b Added copy-constructor-like module->addCell(name, other) method Clifford Wolf 2014-07-26 00:38:44 +02:00
• 2bec47a404 Use only module->addCell() and module->remove() to create and delete cells Clifford Wolf 2014-07-25 15:05:18 +02:00
• 5826670009 Various RTLIL::SigSpec related code cleanups Clifford Wolf 2014-07-25 14:23:31 +02:00
• c762050e7f Added RTLIL::SigSpec is_chunk()/as_chunk() API Clifford Wolf 2014-07-25 14:23:10 +02:00
• 1834af5e53 Added "make vgtest" Clifford Wolf 2014-07-25 13:15:46 +02:00
• 309d64d46a Fixed two memory leaks in ast simplify Clifford Wolf 2014-07-25 13:07:31 +02:00
• 50f22ff30c Renamed some of the test cases in tests/simple to avoid name collisions Clifford Wolf 2014-07-25 13:01:45 +02:00
• 0520bfea89 Fixed memory corruption in "opt_reduce" pass Clifford Wolf 2014-07-25 12:49:51 +02:00
• c4e4f79a2a Disabled cover() for non-linux builds Clifford Wolf 2014-07-25 12:22:37 +02:00
• a8706b73a2 Added more stuff to checklist Clifford Wolf 2014-07-25 12:16:23 +02:00
• 1488bc0c4f Updated verific build/test instructions Clifford Wolf 2014-07-25 12:16:03 +02:00
• 91bf0c90c8 Improvements in "cover" command Clifford Wolf 2014-07-25 12:04:40 +02:00
• 6789e3002a Removed Minisat dependency on zlib Clifford Wolf 2014-07-25 03:31:16 +02:00
• e4a0ab9bed Added more stuff to the checklist Clifford Wolf 2014-07-25 03:18:16 +02:00
• 7f1789ad1b Fixed typo in cover id Clifford Wolf 2014-07-25 03:17:35 +02:00
• cd69925437 Added "make clean-abc" Clifford Wolf 2014-07-25 03:17:06 +02:00
• 01dbf12ac9 Further improved "make" prettiness Clifford Wolf 2014-07-25 03:12:14 +02:00
• 6aa792c864 Replaced more old SigChunk programming patterns Clifford Wolf 2014-07-24 22:47:57 +02:00
• 7a608437c6 Updated ABC to hg id "b1e63d18768d" Clifford Wolf 2014-07-24 20:57:21 +02:00
• 9962384d3e Added cover() calls to opt_const Clifford Wolf 2014-07-24 19:36:43 +02:00
• 10d2402e2f Added cover_list() API Clifford Wolf 2014-07-24 19:36:20 +02:00
• 45b4154b37 Added "make SMALL=1" Clifford Wolf 2014-07-24 19:03:57 +02:00
• 34ea9e3f09 Now "make PRETTY=1" is the default setting Clifford Wolf 2014-07-24 17:55:55 +02:00
• 38afbe62ef Added percentage display to "make PRETTY=1" Clifford Wolf 2014-07-24 17:53:11 +02:00
• b17d6531c8 Added "make PRETTY=1" Clifford Wolf 2014-07-24 17:15:01 +02:00
• 2f54345cff Added "cover" command Clifford Wolf 2014-07-24 15:06:45 +02:00
• e589289df7 Some improvements in SigSpec packing/unpacking and checking Clifford Wolf 2014-07-24 15:05:41 +02:00
• 7679000673 Now using a dedicated ELF section for all coverage counters Clifford Wolf 2014-07-24 15:05:05 +02:00
• 22ede43b3f Small changes regarding cover() and check() in SigSpec Clifford Wolf 2014-07-24 04:46:36 +02:00
• 3a2c535777 Renamed RELEASE_CHECKLIST -> CHECKLIST Clifford Wolf 2014-07-24 04:24:47 +02:00
• 798f713629 Added support for YOSYS_COVER_FILE env variable Clifford Wolf 2014-07-24 04:16:32 +02:00
• 1b0d5fc22d Added cover() calls to RTLIL::SigSpec methods Clifford Wolf 2014-07-24 03:50:28 +02:00
• 9cf12570ba Added support for YOSYS_COVER_DIR env variable Clifford Wolf 2014-07-24 03:49:32 +02:00
• 6b1018314c Added cover() API Clifford Wolf 2014-07-24 03:48:38 +02:00
• b31762d158 Added RELEASE_CHECKLIST Clifford Wolf 2014-07-24 02:13:37 +02:00
• 2267db5834 Added "make config-gcc-4.7" Clifford Wolf 2014-07-24 02:12:24 +02:00
• fa71ae89ac Added "make vloghtb" Clifford Wolf 2014-07-24 02:11:12 +02:00
• 82fa356037 Added hashing to RTLIL::SigSpec relational and equal operators Clifford Wolf 2014-07-23 23:58:03 +02:00
• f368d792fb Disabled RTLIL::SigSpec::check() in release builds Clifford Wolf 2014-07-23 21:42:44 +02:00
• 95ac484548 Fixed release build Clifford Wolf 2014-07-23 21:38:18 +02:00
• 375aa71dfe Various fixes in Verific frontend for new RTLIL API Clifford Wolf 2014-07-23 21:35:01 +02:00
• 2a41afb7b2 Added RTLIL::SigSpec::repeat() Clifford Wolf 2014-07-23 21:34:14 +02:00
• 20a7965f61 Various small fixes (from gcc compiler warnings) Clifford Wolf 2014-07-23 20:45:27 +02:00
• c094c53de8 Removed RTLIL::SigSpec::optimize() Clifford Wolf 2014-07-23 20:32:28 +02:00
• 8fd8e4a468 Turned RTLIL::SigSpec::optimize() to a no-op: a packed SigSpec is now always optimized Clifford Wolf 2014-07-23 20:11:55 +02:00
• 3ec785b881 Fixed manual/CHAPTER_Prog/stubnets.cc Clifford Wolf 2014-07-23 19:36:43 +02:00
• a62c21c9c6 Removed RTLIL::SigSpec::expand() method Clifford Wolf 2014-07-23 16:09:27 +02:00
• 54552f6809 Added eclipse .setting folder to .gitignore Clifford Wolf 2014-07-23 19:30:21 +02:00
• 4e802eb7f6 Fixed all users of SigSpec::chunks_rw() and removed it Clifford Wolf 2014-07-23 15:36:09 +02:00
• 85db102e13 Replaced RTLIL::SigSpec::operator!=() with inline version Clifford Wolf 2014-07-23 15:35:09 +02:00
• 5b51b67297 Merge branch: Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor Clifford Wolf 2014-07-23 10:05:42 +02:00
• ec923652e2 Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3 Clifford Wolf 2014-07-23 09:48:26 +02:00
• a8d3a68971 Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3 Clifford Wolf 2014-07-23 08:40:31 +02:00
• 260c19ec5a Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 1/3 Clifford Wolf 2014-07-23 09:00:16 +02:00
• c61467a32c Some cleanups in RTLIL::SigChunk::SigChunk(const RTLIL::Const&) Clifford Wolf 2014-07-23 08:59:54 +02:00
• 115dd959d9 SigSpec refactoring: More cleanups of old SigSpec use pattern Clifford Wolf 2014-07-22 23:50:21 +02:00
• 9e94f41b89 SigSpec refactoring: Added RTLIL::SigSpecIterator Clifford Wolf 2014-07-22 23:49:26 +02:00
• 4a6d234ec7 SigSpec refactoring: cleanup of old SigSpec usage in fsm_* commands Clifford Wolf 2014-07-22 23:07:42 +02:00
• 65a939cb27 Fixed memory corruption with new SigSpec API in proc_mux Clifford Wolf 2014-07-22 22:54:39 +02:00
• f80da7b41d SigSpec refactoring: added RTLIL::SigSpec::operator[] Clifford Wolf 2014-07-22 22:54:03 +02:00
• e7e30f1c86 fixed memory leak in fsm_opt Clifford Wolf 2014-07-22 22:52:57 +02:00
• fd4cbe6275 SigSpec refactoring: rewrote some RTLIL::SigSpec methods to use unpacked form Clifford Wolf 2014-07-22 22:26:30 +02:00
• a97be0828a Removed RTLIL::SigChunk::compare() Clifford Wolf 2014-07-22 21:40:52 +02:00
• 08e1e25169 SigSpec refactoring: added RTLIL::SigSpec::bits() and pack/unpack api Clifford Wolf 2014-07-22 21:33:52 +02:00
• 28b3fd05fa SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created interim RTLIL::SigSpec::chunks_rw() Clifford Wolf 2014-07-22 20:58:44 +02:00
• 7bffde6abd SigSpec refactoring: change RTLIL::SigSpec::size() to be read-only Clifford Wolf 2014-07-22 20:39:13 +02:00
• 4b4048bc5f SigSpec refactoring: using the accessor functions everywhere Clifford Wolf 2014-07-22 20:15:14 +02:00
• 16e5ae0b92 SigSpec refactoring: renamed the SigSpec members to chunks_ and width_ and added accessor functions Clifford Wolf 2014-07-22 20:12:15 +02:00
• a233762a81 SigSpec refactoring: renamed chunks and width to __chunks and __width Clifford Wolf 2014-07-22 19:56:17 +02:00
• 3b5f4ff39c Fixed ilang parsing of process attributes Clifford Wolf 2014-07-22 20:35:58 +02:00
• d6d0e08834 Fixed make rules for ilang parser Clifford Wolf 2014-07-22 20:18:05 +02:00
• 0229d68fc9 Use "opt -fine" in test/vloght/test_mapopt.sh Clifford Wolf 2014-07-21 21:39:59 +02:00
• 137dbf3cf7 Added "opt_const -keepdc" Clifford Wolf 2014-07-21 21:38:55 +02:00
• 1873480ca5 Added mul to mux conversion to "opt_const -fine" Clifford Wolf 2014-07-21 17:19:50 +02:00
• 1241a9fd50 Added "opt_const -fine" and "opt_reduce -fine" Clifford Wolf 2014-07-21 16:34:16 +02:00