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Commit Graph

  • 366dcd3abf Fixed use of "cmd_error" in passes/cmds/design.cc Clifford Wolf 2014-02-07 14:16:42 +01:00
  • f4f230d7cc Fixed gcc compiler warnings with release build Clifford Wolf 2014-02-06 22:49:14 +01:00
  • 0192f1c66e Disabled ABC retime for now (elliptic_curve_group testcase in yosys-bigsim failed) Clifford Wolf 2014-02-06 22:31:58 +01:00
  • a170d114a5 Updated ABC to rev 10cc13a2a0f1 Clifford Wolf 2014-02-06 22:18:17 +01:00
  • 58cb8d65af Added "retime" to standard ABC recipes Clifford Wolf 2014-02-06 22:16:20 +01:00
  • 91eab69912 Added copy command Clifford Wolf 2014-02-06 22:09:21 +01:00
  • cf593222f2 Added design -stash/-copy-from/-copy-to Clifford Wolf 2014-02-06 21:52:07 +01:00
  • 37fdb2ca7a Added support for s: select expressions (wire width) Clifford Wolf 2014-02-06 19:45:03 +01:00
  • 9428050dd6 Added i:, o:, and x: selection pattern Clifford Wolf 2014-02-06 19:35:33 +01:00
  • d7d1c7baf8 Added support for %m selection op Clifford Wolf 2014-02-06 19:30:08 +01:00
  • f2fdcef13d Merge branch 'master' of github.com:cliffordwolf/yosys Clifford Wolf 2014-02-06 19:22:50 +01:00
  • fa295a4528 Added generic RTLIL::SigSpec::parse_sel() with support for selection variables Clifford Wolf 2014-02-06 19:22:46 +01:00
  • 9c24b41f55 Merge pull request #23 from hansiglaser/master Clifford Wolf 2014-02-06 18:08:02 +01:00
  • 34eb77d2bf new %s: add sub-modules to selection Johann Glaser 2014-02-06 17:36:39 +01:00
  • d4b0f28881 Added support for sat -show @<sel_name> Clifford Wolf 2014-02-06 17:32:51 +01:00
  • b1a12c5f37 Added sat -set-init-def and sat -tempinduct-def Clifford Wolf 2014-02-06 16:15:23 +01:00
  • 594d52e0b6 Added opt_const -undriven Clifford Wolf 2014-02-06 15:49:03 +01:00
  • c526e56747 Added expose -dff Clifford Wolf 2014-02-06 15:48:42 +01:00
  • 1c6dea3a0d Added support for #-comments in same line as command Clifford Wolf 2014-02-06 14:26:39 +01:00
  • 821156b6cf presentation progress Clifford Wolf 2014-02-06 14:01:43 +01:00
  • c13c5b9b7b Changed techmap description from "simple" to "generic" Clifford Wolf 2014-02-06 13:10:06 +01:00
  • eb8fd4a163 Added miter -make_outcmp Clifford Wolf 2014-02-06 02:20:55 +01:00
  • 80a1cdb0e2 Added sat -set-init-zero support Clifford Wolf 2014-02-06 01:40:01 +01:00
  • 19029f377b Added support for backslash continuation in script files Clifford Wolf 2014-02-06 01:28:33 +01:00
  • 849fd62cfe Added counters sat test case Clifford Wolf 2014-02-06 01:00:11 +01:00
  • e915043144 Added sat -verify and -falsify support for non-prove cases Clifford Wolf 2014-02-06 00:59:41 +01:00
  • cd06055e77 Added expose command Clifford Wolf 2014-02-05 23:59:55 +01:00
  • 7e9ba60df8 presentation progress Clifford Wolf 2014-02-05 20:06:34 +01:00
  • dbfcc2f4e2 Simplified select "Assertation failed" message generation Clifford Wolf 2014-02-05 18:52:55 +01:00
  • 94b802c65d Merge branch 'master' of github.com:cliffordwolf/yosys Clifford Wolf 2014-02-05 18:46:47 +01:00
  • 7ea97a0471 Merge pull request #22 from hansiglaser/master Clifford Wolf 2014-02-05 18:46:36 +01:00
  • 583636f0ad Added BTOR backend README file Clifford Wolf 2014-02-05 18:31:10 +01:00
  • f6e6e9b844 Added selection support for r: and selection with relational operators Clifford Wolf 2014-02-05 18:24:45 +01:00
  • 3c0b5139a1 be more verbose for select -assert-any and -assert-none Johann Glaser 2014-02-05 16:03:02 +01:00
  • 667543de0b improved help for "select" Johann Glaser 2014-02-05 15:53:02 +01:00
  • 3b5c462273 presentation progress Clifford Wolf 2014-02-05 15:06:13 +01:00
  • 9f6364c1c4 presentation progress Clifford Wolf 2014-02-05 13:12:50 +01:00
  • aa8e754ae5 Added read_verilog -setattr Clifford Wolf 2014-02-05 11:22:10 +01:00
  • 5bf33de24a Added setattr and setparam commands Clifford Wolf 2014-02-05 11:11:55 +01:00
  • 078cecf9ea Updated todo items in README file Clifford Wolf 2014-02-05 01:59:30 +01:00
  • aa9da46807 Removed old unused files from tests/ Clifford Wolf 2014-02-05 01:55:39 +01:00
  • 968ae31cac Added support for dump -append Clifford Wolf 2014-02-04 23:45:30 +01:00
  • 1fb8ba73bd Throw errors if non-existing selection variables are used Clifford Wolf 2014-02-04 23:31:06 +01:00
  • b1bf55dd63 Added select -none Clifford Wolf 2014-02-04 23:23:44 +01:00
  • e0c867db53 presentation progress Clifford Wolf 2014-02-04 23:00:48 +01:00
  • 99b9c56da1 Fixed detection of init attribute in opt_rmdff Clifford Wolf 2014-02-04 23:00:32 +01:00
  • 69e867f3e8 Added support for inline commands to abc -script Clifford Wolf 2014-02-04 22:01:53 +01:00
  • 03d63dd861 presentation progress Clifford Wolf 2014-02-04 16:51:12 +01:00
  • 7a5f378bae Added hierarchy -purge_lib option Clifford Wolf 2014-02-04 16:50:13 +01:00
  • 7a66b38c3e Added test cases for sat command Clifford Wolf 2014-02-04 13:43:34 +01:00
  • 6891fd79a3 added sat -falsify Clifford Wolf 2014-02-04 13:34:37 +01:00
  • d267bcde4e Fixed bug in sequential sat proofs and improved handling of asserts Clifford Wolf 2014-02-04 12:46:16 +01:00
  • ecdf1f5577 Improved handling of reg init in opt_share and opt_rmdff Clifford Wolf 2014-02-04 12:02:47 +01:00
  • 9e938aa32a presentation progress Clifford Wolf 2014-02-04 00:57:11 +01:00
  • 6c3d767976 presentation progress Clifford Wolf 2014-02-03 16:26:27 +01:00
  • 9e35021585 Addred sat option -ignore_unknown_cells Clifford Wolf 2014-02-03 16:26:10 +01:00
  • a6750b3753 Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem) Clifford Wolf 2014-02-03 13:01:45 +01:00
  • de9226a64f Replaced isim with xsim in tests/tools/autotest.sh, removed xst support Clifford Wolf 2014-02-03 13:00:55 +01:00
  • de336d93b2 More opt_const -mux_bool features Clifford Wolf 2014-02-02 22:41:24 +01:00
  • 982c9da011 presentation progress Clifford Wolf 2014-02-02 22:26:26 +01:00
  • 9d0b69edaa Added opt_const -mux_bool Clifford Wolf 2014-02-02 22:11:08 +01:00
  • bee4450c4c Added support for inverter chains to opt_const Clifford Wolf 2014-02-02 21:46:42 +01:00
  • f9c4d33909 Added RTLIL::SigSpec::to_single_sigbit() Clifford Wolf 2014-02-02 21:35:26 +01:00
  • 67b0ce2578 Only generate write-enable $and if WE is not constant 1 in memory_map Clifford Wolf 2014-02-02 21:27:26 +01:00
  • 83fa652820 Added constant-clock case to opt_rmdff Clifford Wolf 2014-02-02 21:09:08 +01:00
  • 6983d3f10b presentation progress Clifford Wolf 2014-02-02 17:57:14 +01:00
  • aa732b0c73 Added show -notitle option Clifford Wolf 2014-02-02 17:55:32 +01:00
  • 9808acdc75 Added delete command Clifford Wolf 2014-02-02 17:11:19 +01:00
  • a9e2d86f86 Added suuport for module attribute matching with A:<pattern>[=<pattern>] syntax Clifford Wolf 2014-02-02 16:47:17 +01:00
  • 0f88e28693 presentation progress Clifford Wolf 2014-02-02 13:30:49 +01:00
  • 9334c34170 presentation progress Clifford Wolf 2014-02-02 13:06:28 +01:00
  • cdd6e11af5 Added support for blanks after -I and -D in read_verilog Clifford Wolf 2014-02-02 13:06:21 +01:00
  • f4f0bd6eef Fixed a bug in miter command Clifford Wolf 2014-02-01 22:53:27 +01:00
  • 374674aff4 Added sat -show-inputs and -show-outputs Clifford Wolf 2014-02-01 22:52:44 +01:00
  • caf540d1ad Added show -color support for cells and finished show -label implementation Clifford Wolf 2014-02-01 18:23:32 +01:00
  • af325bf206 Fixed comment/eol parsing in ilang frontend Clifford Wolf 2014-02-01 17:28:02 +01:00
  • d06258f74f Added constant size expression support of sized constants Clifford Wolf 2014-02-01 13:50:23 +01:00
  • 1e2440e7ed Added note about SystemVerilog assert statement to README Clifford Wolf 2014-02-01 13:04:49 +01:00
  • fa92722358 Added miter command Clifford Wolf 2014-02-01 10:35:56 +01:00
  • 1c8f6f21b4 Progress on presentation Clifford Wolf 2014-01-31 12:48:31 +01:00
  • ed8ad99960 More changes to techlibs/common/simlib.v for LEC Clifford Wolf 2014-01-31 11:21:29 +01:00
  • 36a808c572 presentation progress Clifford Wolf 2014-01-30 15:25:09 +01:00
  • 4df7e03ec9 Bugfix in name resolution with generate blocks Clifford Wolf 2014-01-30 14:52:46 +01:00
  • 672229eda5 Added yosys -H for command list Clifford Wolf 2014-01-30 12:32:59 +01:00
  • 34b39ec28a presentation progress Clifford Wolf 2014-01-29 15:56:58 +01:00
  • cbe77bf844 presentation progress Clifford Wolf 2014-01-29 12:15:38 +01:00
  • aceab5fc08 Tiny change in example script in README Clifford Wolf 2014-01-29 11:11:10 +01:00
  • 96084e9864 Added -h command line option Clifford Wolf 2014-01-29 11:10:39 +01:00
  • 6a7d7e847d Added test comments to techlibs/cmos/cmos_cells.lib Clifford Wolf 2014-01-29 10:51:02 +01:00
  • c46b23ab23 Updated ABC to hg rev e6b09e1 Clifford Wolf 2014-01-29 10:50:15 +01:00
  • 375c4dddc1 Added read_verilog -icells option Clifford Wolf 2014-01-29 00:59:28 +01:00
  • a86f33653d Major rewrite of techlibs/common/simlib.v for LEC (cadance conformal) Clifford Wolf 2014-01-29 00:36:03 +01:00
  • 961b791272 presentation progress Clifford Wolf 2014-01-28 20:28:22 +01:00
  • 2cb47355d4 Renamed manual/FILES_* directories Clifford Wolf 2014-01-28 06:55:47 +01:00
  • 842ca2f011 Progress on presentation Clifford Wolf 2014-01-28 06:51:50 +01:00
  • a3ac6b6f47 Progress on presentation Clifford Wolf 2014-01-27 20:42:35 +01:00
  • fb4c3dff33 Added first presentation slides Clifford Wolf 2014-01-27 17:08:19 +01:00
  • fa103e55ad Merge branch 'btor' of https://github.com/ahmedirfan1983/yosys Clifford Wolf 2014-01-26 02:29:19 +01:00
  • fd6ca84f3c Merge pull request #21 from hansiglaser/master Clifford Wolf 2014-01-25 17:28:17 -08:00
  • e9a2094774 enabled multiple "-map" for the extract pass Johann Glaser 2014-01-25 21:11:34 +01:00