Claire Wolf 1bf2bdf05b Merge pull request #1607 from whitequark/simplify-simplify-meminit ...

ast: avoid intermediate wires/assigns when lowering to AST_MEMINIT

2020-03-27 17:28:26 +01:00

..

aiger

Fix NDEBUG warnings

2020-03-19 08:48:39 -07:00

ast

Merge pull request #1607 from whitequark/simplify-simplify-meminit

2020-03-27 17:28:26 +01:00

blif

Fix parsing of .cname BLIF statements

2019-10-16 09:06:57 +02:00

ilang

read_ilang: do bounds checking on bit indices

2019-11-27 22:24:39 +01:00

json

Update JSON front-end to process new attr/param encoding

2019-08-01 12:48:22 +02:00

liberty

stoi -> atoi

2019-08-07 11:09:17 -07:00

rpc

Fix compilation for emcc

2020-03-11 22:09:24 +08:00

verific

Merge pull request #1667 from YosysHQ/clifford/verificnand

2020-01-30 19:55:53 +01:00

verilog

Build pkg_user_types before parsing in case of changes in the design.

2020-03-22 18:20:46 -07:00