github.com/YosysHQ.yosys
1
0
Fork 0
mirror of synced 2026-02-21 15:07:30 +00:00
Code Issues Releases Wiki Activity
Files
030e495c8b617ba59b4cd01393f85448450c373a
YosysHQ.yosys/kernel/rtlil.cc
Robert O'Callahan dcd7742d52 Avoid scanning entire module if there are no wires to remove 
It's pretty common for `opt_clean` to find no wires to remove. In that case,
there is no point scanning the entire design, which can be significantly
expensive for huge designs.
2026-01-23 01:38:20 +00:00

171 KiB
Raw Blame History

View Raw
Reference in New Issue View Git Blame Copy Permalink