1
0
mirror of synced 2026-01-30 13:46:39 +00:00
Files
YosysHQ.yosys/techlibs/common/simlib.v
Scott Ashcroft 04bbd4e7e2 Make all vector-size related integer params in $print sim model signed
This fixes iverilog crashes on 32-bit, similar to 95944eb for $mem.
2025-03-25 13:08:49 +00:00

76 KiB