github.com/YosysHQ.yosys
1
0
Fork 0
mirror of synced 2026-05-01 22:17:38 +00:00
Code Issues Releases Wiki Activity
Files
09b493cfcd6ec79320e9a1f660b93ebd6a80085e
YosysHQ.yosys/techlibs/intel_alm/common/misc_sim.v
gatecat eb106732d9 intel_alm: Add global buffer insertion 
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 22:37:06 +01:00

562 B
Raw Blame History

View Raw
Reference in New Issue View Git Blame Copy Permalink