github.com/YosysHQ.yosys
1
0
Fork 0
mirror of synced 2026-04-25 20:02:10 +00:00
Code Issues Releases Wiki Activity
Files
17269ae59bda6bcf60dbc9ad9d00afc69aa05499
YosysHQ.yosys/Makefile
Miodrag Milanovic 17269ae59b Option to disable verific VHDL support
2021-10-20 10:02:58 +02:00

35 KiB
Raw Blame History

View Raw
Reference in New Issue View Git Blame Copy Permalink