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YosysHQ.yosys/techlibs/xilinx/xc7_brams_map.v
Maciej Dudek cfddef5d7d Fixes xc7 BRAM36s
UG473 from Xilinx states that 15 bit should always be set if RAMB isn't in cascade mode.

Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2021-07-30 16:17:22 +02:00

8.3 KiB