1
0
mirror of synced 2026-05-04 15:17:27 +00:00
Files
YosysHQ.yosys/tests/arch/quicklogic
Krystine Sherwin 3d08ed216d QLF_TDP36K: parameterised sim test gen
Also limited to 16 tests per file to allow parallelism.
Previous tests are converted to new test format with no sim test steps.
2023-12-04 15:52:03 +01:00
..