Jannis Harder 96f64f4788 verific: Fix conditions of SVAs with explicit clocks within procedures ...

For SVAs that have an explicit clock and are contained in a procedure
which conditionally executes the assertion, verific expresses this using
a mux with one input connected to constant 1 and the other output
connected to an SVA_AT. The existing code only handled the case where
the first input is connected to 1. This patch also handles the other
case.

2022-05-03 14:13:08 +02:00

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