Miodrag Milanović 66fca65b58

Merge branch 'master' into mmicko/anlogic

2019-10-18 10:53:56 +02:00

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aiger

tests: use optional ABCEXTERNAL when specified

2019-06-27 23:00:13 -04:00

anlogic

hierarchy - proc reorder

2019-10-18 09:06:43 +02:00

arch

Add simcells.v, simlib.v, and some output

2019-06-27 11:13:49 -07:00

asicworld

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bram

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ecp5

hierarchy - proc reorder

2019-10-18 09:04:02 +02:00

errors

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fsm

Speed up "make test" and related cleanups

2019-08-17 14:37:07 +02:00

hana

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ice40

Merge pull request #1433 from YosysHQ/eddie/equiv_opt_async2sync

2019-10-08 10:53:44 -07:00

liberty

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lut

Forgot to commit

2019-07-16 12:44:26 -07:00

memories

memory_dff: Fix checking of feedback mux input when more than one mux

2019-07-02 13:35:50 +01:00

opt

Add missing -assert to equiv_opt

2019-09-06 22:51:44 -07:00

opt_share

Support various binary operators in opt_share

2019-08-04 19:06:38 +02:00

proc

proc_clean: fix order of switch insertion.

2019-08-19 16:44:23 +00:00

realmath

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rpc

rpc: new frontend.

2019-09-30 15:53:11 +00:00

sat

Revert "Add test that is expecting to fail"

2019-10-08 12:41:26 -07:00

share

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simple

simple/peepopt.v tests to various/peepopt.ys with equiv_opt & select

2019-09-05 08:43:22 -07:00

simple_abc9

Revert "abc9 followed by clean otherwise netlist could be invalid for sim"

2019-09-05 08:25:09 -07:00

smv

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sva

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svinterfaces

Fix typo in tests/svinterfaces/runone.sh

2019-05-03 14:40:51 +02:00

svtypes

Use "(id)" instead of "id" for types as temporary hack

2019-10-14 05:24:31 +02:00

techmap

Merge pull request #1422 from YosysHQ/eddie/aigmap_select

2019-10-03 11:54:04 +02:00

tools

autotest.sh to define _AUTOTB when test_autotb

2019-06-28 14:56:22 -07:00

unit

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various

Use sat -tempinduct and comments for why equiv_opt not sufficient

2019-10-03 11:11:50 -07:00

vloghtb

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xilinx

hierarchy - proc reorder

2019-10-18 08:06:57 +02:00