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YosysHQ.yosys/tests/xilinx
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Miodrag Milanovic e6ad714d20 hierarchy - proc reorder
2019-10-18 08:06:57 +02:00
..
.gitignore
hierarchy - proc reorder
2019-10-18 08:06:57 +02:00
add_sub.v
Add smoke tests to tests/xilinx
2019-10-17 17:10:02 +02:00
add_sub.ys
hierarchy - proc reorder
2019-10-18 08:06:57 +02:00
adffs.v
Test per flip-flop type
2019-10-17 17:10:42 +02:00
adffs.ys
hierarchy - proc reorder
2019-10-18 08:06:57 +02:00
counter.v
Add smoke tests to tests/xilinx
2019-10-17 17:10:02 +02:00
counter.ys
Make equivalence work with latest master
2019-10-17 17:24:53 +02:00
dffs.v
Test dffs separetely
2019-10-17 17:11:11 +02:00
dffs.ys
hierarchy - proc reorder
2019-10-18 08:06:57 +02:00
dsp_simd.ys
Add SIMD test
2019-09-09 21:40:06 -07:00
fsm.v
remove not needed top module
2019-10-17 17:11:11 +02:00
fsm.ys
remove not needed top module
2019-10-17 17:11:11 +02:00
latches.v
Split latches into separete tests
2019-10-17 17:11:11 +02:00
latches.ys
hierarchy - proc reorder
2019-10-18 08:06:57 +02:00
logic.v
Add smoke tests to tests/xilinx
2019-10-17 17:10:02 +02:00
logic.ys
hierarchy - proc reorder
2019-10-18 08:06:57 +02:00
macc_tb.v
Add mac.sh and macc_tb.v for testing
2019-09-19 18:08:16 -07:00
macc.sh
Add mac.sh and macc_tb.v for testing
2019-09-19 18:08:16 -07:00
macc.v
Refine macc testcase
2019-09-18 12:07:25 -07:00
macc.ys
hierarchy - proc reorder
2019-10-18 08:06:57 +02:00
memory.v
Add smoke tests to tests/xilinx
2019-10-17 17:10:02 +02:00
memory.ys
Add smoke tests to tests/xilinx
2019-10-17 17:10:02 +02:00
mul_unsigned.v
Add mul_unsigned test
2019-08-30 14:35:05 -07:00
mul_unsigned.ys
hierarchy - proc reorder
2019-10-18 08:06:57 +02:00
mul.v
Add smoke tests to tests/xilinx
2019-10-17 17:10:02 +02:00
mul.ys
hierarchy - proc reorder
2019-10-18 08:06:57 +02:00
mux.v
split muxes synth per type
2019-10-17 17:11:11 +02:00
mux.ys
hierarchy - proc reorder
2019-10-18 08:06:57 +02:00
pmgen_xilinx_srl.ys
Use test_pmgen for xilinx_srl
2019-08-28 09:55:09 -07:00
run-test.sh
Move $x to end as 7f0eec8
2019-10-17 17:10:02 +02:00
shifter.v
Clean verilog code from not used define block
2019-10-17 17:10:42 +02:00
shifter.ys
Add smoke tests to tests/xilinx
2019-10-17 17:10:02 +02:00
tribuf.v
remove not needed top module
2019-10-17 17:11:11 +02:00
tribuf.ys
remove not needed top module
2019-10-17 17:11:11 +02:00
xilinx_srl.v
Add xilinx_srl test
2019-08-28 09:24:19 -07:00
xilinx_srl.ys
Do not simplemap for variable test
2019-08-28 09:26:08 -07:00