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8b239ee707a2bf4a868728046d7f64c16d74aa2a
YosysHQ.yosys
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tests
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svinterfaces
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svinterface1_ref.v
Ruben Undheim
d5aac2650f
Basic test for checking correct synthesis of SystemVerilog interfaces
2018-10-18 22:40:53 +02:00
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