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8f3d1f8fcfb5f853b1dfddc1073b4e79a81d6bd8
YosysHQ.yosys
/
techlibs
/
greenpak4
History
Andrew Zonenberg
8f3d1f8fcf
greenpak4: Added support for inferred input/output inverters on latches
2016-12-10 19:58:32 +08:00
..
cells_latch.v
greenpak4: Can now techmap inferred D latches (without set/reset or output inverter)
2016-12-10 18:46:36 +08:00
cells_map.v
Initial implementation of techlib support for GreenPAK latches. Instantiation only, no behavioral inference yet.
2016-12-05 21:22:41 -08:00
cells_sim.v
greenpak4: Inverted D latch cells now have nQ instead of Q as output port name for consistency
2016-12-10 13:57:37 +08:00
gp_dff.lib
Fixed indenting in techlibs/greenpak4/gp_dff.lib
2016-03-29 13:44:14 +02:00
greenpak4_counters.cc
Added "yosys -D" feature
2016-04-21 23:28:37 +02:00
greenpak4_dffinv.cc
greenpak4: Added support for inferred input/output inverters on latches
2016-12-10 19:58:32 +08:00
Makefile.inc
greenpak4: Can now techmap inferred D latches (without set/reset or output inverter)
2016-12-10 18:46:36 +08:00
synth_greenpak4.cc
greenpak4: Can now techmap inferred D latches (without set/reset or output inverter)
2016-12-10 18:46:36 +08:00