github.com/YosysHQ.yosys
1
0
Fork 0
mirror of synced 2026-01-22 10:41:43 +00:00
Code Issues Releases Wiki Activity
YosysHQ.yosys/tests/arch
History
Lofty a3a90f6377 Revert "intel_alm: direct M10K instantiation" 
This reverts commit 09ecb9b2cf3ab76841d30712bf70dafc6d47ef67.
2020-07-13 18:05:38 +02:00
..
anlogic
Simplify breaking tests/arch/*/fsm.ys tests
2020-03-20 11:25:17 -07:00
common
ecp5: add support for both 1364.1 and LSE RAM/ROM attributes.
2020-02-06 16:52:51 +00:00
ecp5
tests: tidy up testcase
2020-06-03 08:41:55 -07:00
efinix
Simplify breaking tests/arch/*/fsm.ys tests
2020-03-20 11:25:17 -07:00
gowin
gowin: Use dfflegalize.
2020-07-06 12:27:46 +02:00
ice40
allow range for mux test
2020-06-01 13:48:19 +02:00
intel_alm
Revert "intel_alm: direct M10K instantiation"
2020-07-13 18:05:38 +02:00
xilinx
xilinx: Fix srl regression.
2020-07-12 23:41:27 +02:00
run-test.sh
tests: extend tests/arch/run-tests.sh for defines
2020-03-05 08:08:32 -08:00