This website requires JavaScript.
Explore
Help
Register
Sign In
github.com
/
YosysHQ.yosys
Watch
1
Star
0
Fork
0
You've already forked YosysHQ.yosys
mirror of
synced
2026-01-15 00:12:13 +00:00
Code
Issues
Releases
Wiki
Activity
YosysHQ.yosys
/
tests
/
arch
History
Eddie Hung
b454735bea
Merge remote-tracking branch 'origin/master' into xaig_dff
2020-01-02 12:44:06 -08:00
..
anlogic
Call equiv_opt with -multiclock and -assert
2019-12-31 18:39:32 -08:00
common
Merge pull request
#1574
from YosysHQ/eddie/xilinx_lutram
2019-12-16 21:48:21 -08:00
ecp5
Do not do call equiv_opt when no sim model exists
2019-12-31 18:40:30 -08:00
efinix
Call equiv_opt with -multiclock and -assert
2019-12-31 18:39:32 -08:00
gowin
Call equiv_opt with -multiclock and -assert
2019-12-31 18:39:32 -08:00
ice40
Revert insertion of 'reg', leave note behind
2020-01-01 09:05:46 -08:00
xilinx
Merge remote-tracking branch 'origin/master' into xaig_dff
2020-01-02 12:44:06 -08:00
run-test.sh
Add simcells.v, simlib.v, and some output
2019-06-27 11:13:49 -07:00