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YosysHQ.yosys/tests/arch/common
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Eddie Hung a73f96594f
Merge pull request #1574 from YosysHQ/eddie/xilinx_lutram 
xilinx: add LUTRAM rules for RAM32M, RAM64M
2019-12-16 21:48:21 -08:00
..
memory_attributes
Fixing compiler warning/issues. Moving test script to the correct place
2019-12-16 10:23:45 -06:00
add_sub.v
Unify verilog style
2019-10-18 12:50:24 +02:00
adffs.v
Unify verilog style
2019-10-18 12:50:24 +02:00
blockram.v
Merge blockram tests
2019-12-16 13:01:51 -08:00
counter.v
fixed error
2019-10-18 13:15:36 +02:00
dffs.v
Unify verilog style
2019-10-18 12:50:24 +02:00
fsm.v
Unify verilog style
2019-10-18 12:50:24 +02:00
latches.v
Unify verilog style
2019-10-18 12:50:24 +02:00
logic.v
Unify verilog style
2019-10-18 12:50:24 +02:00
lutram.v
Rename memory tests to lutram, add more xilinx tests
2019-12-12 17:44:37 -08:00
mul.v
Unify verilog style
2019-10-18 12:50:24 +02:00
mux.v
Unify verilog style
2019-10-18 12:50:24 +02:00
shifter.v
Unify verilog style
2019-10-18 12:50:24 +02:00
tribuf.v
Unify verilog style
2019-10-18 12:50:24 +02:00