whitequark 7191dd16f9 Use C++11 final/override keywords.

2020-06-18 23:34:52 +00:00

..

anlogic_eqn.cc

Use C++11 final/override keywords.

2020-06-18 23:34:52 +00:00

anlogic_fixcarry.cc

Use C++11 final/override keywords.

2020-06-18 23:34:52 +00:00

arith_map.v

Add force_downto and force_upto wire attributes.

2020-05-19 01:42:40 +02:00

cells_map.v

Add force_downto and force_upto wire attributes.

2020-05-19 01:42:40 +02:00

cells_sim.v

make note that it is for latch mode

2019-09-18 17:48:16 +02:00

eagle_bb.v

Revert "Leave only real black box cells"

2018-12-17 23:20:40 +08:00

lutram_init_16x4.vh

Harmonize BRAM/LUTRAM descriptions across all of Yosys.

2020-01-01 12:30:00 +00:00

lutrams_map.v

Harmonize BRAM/LUTRAM descriptions across all of Yosys.

2020-01-01 12:30:00 +00:00

lutrams.txt

Harmonize BRAM/LUTRAM descriptions across all of Yosys.

2020-01-01 12:30:00 +00:00

Makefile.inc

Harmonize BRAM/LUTRAM descriptions across all of Yosys.

2020-01-01 12:30:00 +00:00

synth_anlogic.cc

Use C++11 final/override keywords.

2020-06-18 23:34:52 +00:00