Miodrag Milanovic 77d557d00b Add missing latch mapping

2019-10-04 12:58:11 +02:00

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achronix

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anlogic

make note that it is for latch mode

2019-09-18 17:48:16 +02:00

common

Missing (* mul2dsp *) for sliceB

2019-09-27 14:21:47 -07:00

coolrunner2

Fix spacing

2019-08-06 16:47:55 -07:00

easic

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ecp5

ecp5: Fix shuffle_enable port

2019-10-01 14:14:46 +01:00

efinix

Add missing latch mapping

2019-10-04 12:58:11 +02:00

gowin

Fix formatting for msys2 mingw build using GetSize

2019-08-01 17:27:34 +02:00

greenpak4

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ice40

Re-order

2019-09-27 14:32:07 -07:00

intel

techlibs/intel: Clean up Makefile

2019-08-05 11:22:11 -07:00

sf2

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xilinx

Add LDCE/LDPE sim library, remove from *cells_xtra.{v,py}

2019-09-30 12:52:43 +02:00

.gitignore

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