Lofty c6cce2d6e5 analogdevices: LUT RAM only on positive edge

2026-02-19 10:59:59 +00:00

..

abc9_model.v

Create synth_analogdevices

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arith_map.v

analogdevices: update timing model

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brams_defs.vh

Create synth_analogdevices

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brams_map.v

analogdevices: Adding RBRAM2 and -tech

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brams.txt

analogdevices: Adding RBRAM2 and -tech

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cells_map.v

Create synth_analogdevices

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cells_sim.v

analogdevices: DSP tweaks

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dsp_map.v

analogdevices: DSP inference

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ff_map.v

test suite

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lut_map.v

analogdevices: use single tech param

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lutrams_map.v

analogdevices: Native LUTRAM primitives

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lutrams.txt

analogdevices: LUT RAM only on positive edge

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Makefile.inc

analogdevices: remove cells_xtra

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mux_map.v

Create synth_analogdevices

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retarget_map.v

analogdevices: user retargeting

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synth_analogdevices.cc

analogdevices: DSP tweaks

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