Clifford Wolf cdae8abe16 Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

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abc

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

cmds

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

fsm

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

hierarchy

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

memory

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

opt

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

proc

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

sat

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

techmap

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

tests

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00