Clifford Wolf cdae8abe16 Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

..

.gitignore

Renamed "stdcells.v" to "techmap.v"

2014-07-31 02:32:00 +02:00

dfflibmap.cc

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

extract.cc

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

filterlib.cc

Moved dfflibmap from passes/dfflibmap to passes/techmap

2013-10-16 15:32:26 +02:00

hilomap.cc

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

iopadmap.cc

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

libparse.cc

Fixed dumping of timing() { .. } block in libparse

2014-03-09 15:16:07 +01:00

libparse.h

renamed LibertyParer to LibertyParser

2014-01-14 18:57:47 +01:00

Makefile.inc

Renamed "stdcells.v" to "techmap.v"

2014-07-31 02:32:00 +02:00

simplemap.cc

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

techmap.cc

Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace

2014-07-31 13:19:47 +02:00