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mirror of synced 2026-01-21 10:23:03 +00:00
Gary Wong 4ffd05af6f verilog: add support for SystemVerilog string literals.
Differences are new escape sequences (including escaped newline
continuations and hex escapes) and triple-quoted literals.
2025-08-11 13:34:10 +02:00
..
2024-05-10 09:51:37 +12:00