fixed PI channels, implemented clock

README.md

@@ -28,12 +28,9 @@ Otherwise you need SDL and pthread.
 
 ## Running
 
-The cpu and the console tty are implemented.
+The cpu (apr), console tty and paper tape/punch are implemented.
-The paper tape reader and punch are work in progress,
+There are no other external devices yet.
-there are no other external devices yet.
+The only things missing from the cpu is the repeat key mechanism.
-The only things missing from the cpu are the clock to generate interrupts
-and the repeat key mechanism.
-The simulator reads `fmem` and `mem` to initialise the memory and fast memory.
 
 ## File tree
 
@@ -45,7 +42,7 @@ The simulator reads `fmem` and `mem` to initialise the memory and fast memory.
 
 ## To do
 
-- clock, repeat and maint. switches
+- repeat and maint. switches
 - test thoroughly!
 - devices
 - timing

code/main.s

@@ -3,6 +3,9 @@ AC1==1
 AC2==2
 PDP==17
 
+CPA==0
+PRS==4
+
 PTP==100
 
 EXTERNAL PUTC,PUTS
@@ -13,8 +16,13 @@ ENTRY:	JRST	START
 PDL:	BLOCK	100
 SP:	XWD	-100,PDL-1
 
-START:
+START:	MOVE	PDP,SP
-	MOVE	PDP,SP
+
+	CONO	CPA,2001
+	CONO	PRS,2300
+	JRST	.
+
+;	UUO1	123
 
 	MOVSI	AC2,440700
 	HRRI	AC2,MSG
@@ -27,8 +35,7 @@ START:
 
 	HALT
 
-PTPUT:
+PTPUT:	CONSZ	PTP,20
-	CONSZ	PTP,20
 	 JRST	.-1
 	DATAO	PTP,AC1
 	POPJ	PDP,
@@ -36,4 +43,36 @@ PTPUT:
 MSG:	ASCIZ /Hello, world!
 yo! > /
 
+; UUO HANDLER
+UUO:	0
+	MOVSI	AC2,440700
+	HRRI	AC2,UUOMSG
+	PUSHJ	PDP,PUTS
+	JRSTF	@UUO
+UUOMSG:	ASCIZ /(UUO)/
+
+CLK:	^D60
+
+; CHANNEL 1 HANDLER
+CH1:	0
+	SOSLE	CLK
+	 JRST	CH1X
+	MOVEI	AC2,^D60
+	MOVEM	AC2,CLK
+	MOVSI	AC2,440700
+	HRRI	AC2,CH1MSG
+	PUSHJ	PDP,PUTS
+CH1X:	CONO	CPA,1001
+	JEN	@CH1
+CH1MSG:	ASCIZ /*TICK*/
+
+; UUO AND PI VECTORS
+LOC 40
+LOC40:	0
+	JSR	UUO
+	JSR	CH1
+	HALT	1
+
+RELOC
+
 END ENTRY

src/apr.c

@@ -327,20 +327,29 @@ recalc_req(IOBus *bus)
 	bus->c34 = bus->c34&~0177LL | req&0177;
 }
 
+/* Decode pia into req and place it onto the bus */
+void
+setreq(IOBus *bus, int dev, u8 pia)
+{
+	u8 req;
+	req = (0200>>pia) & 0177;
+	if(bus->dev[dev].req != req){
+		bus->dev[dev].req = req;
+		recalc_req(bus);
+	}
+}
+
 void
 recalc_cpa_req(Apr *apr)
 {
-	u8 req = 0;
+	u8 pia = 0;
 	// 8-5
 	if(apr->cpa_illeg_op || apr->cpa_non_exist_mem || apr->cpa_pdl_ov ||
 	   apr->cpa_clock_flag && apr->cpa_clock_enable ||
 	   apr->ar_pc_chg_flag && apr->cpa_pc_chg_enable ||
 	   apr->ar_ov_flag && apr->cpa_arov_enable)
-		req = apr->cpa_pia;
+		pia = apr->cpa_pia;
-	if(apr->iobus.dev[CPA].req != req){
+	setreq(&apr->iobus, CPA, pia);
-		apr->iobus.dev[CPA].req = req;
-		recalc_req(&apr->iobus);
-	}
 }
 
 void
@@ -742,6 +751,7 @@ wake_pi(void *dev)
 			apr->pi_active = 0;
 		if(bus->c12 & F28)
 			apr->pi_active = 1;
+printf("%o %o\n", apr->pir, apr->pio);
 	}
 }
 
@@ -2638,7 +2648,7 @@ pulse(ft0){
 
 pulse(at5){
 	trace("AT5\n");
-//	apr->a_long = 1;		// ?? nowhere to be found
+	apr->a_long = 1;		// ?? nowhere to be found
 	apr->af0 = 1;			// 5-3
 	apr->ma |= apr->mb & RT;	// 7-3
 	apr->ir &= ~037;		// 5-7
@@ -2671,7 +2681,7 @@ pulse(at3){
 
 pulse(at2){
 	trace("AT2\n");
-//	apr->a_long = 1;		// ?? nowhere to be found
+	apr->a_long = 1;		// ?? nowhere to be found
 	apr->ma |= apr->ir & 017;	// 7-3
 	apr->af3 = 1;			// 5-3
 	nextpulse(apr, mc_rd_rq_pulse);	// 7-8
@@ -3046,6 +3056,8 @@ updatebus(void *bus)
 	b->c34_pulse = (b->c34_prev ^ b->c34) & b->c34;
 }
 
+#define TIMESTEP (1000.0/60.0)
+
 void*
 aprmain(void *p)
 {
@@ -3053,6 +3065,7 @@ aprmain(void *p)
 	Busdev *dev;
 	Pulse **tmp;
 	int i, devcode;
+	double lasttick, tick;
 
 	apr = (Apr*)p;
 	apr->clist = apr->pulses1;
@@ -3072,6 +3085,7 @@ aprmain(void *p)
 			apr->membus.cmem[i]->poweron(apr->membus.cmem[i]);
 
 	nextpulse(apr, mr_pwr_clr);
+	lasttick = getms();
 	while(apr->sw_power){
 		apr->ncurpulses = apr->nnextpulses;
 		apr->nnextpulses = 0;
@@ -3084,6 +3098,13 @@ aprmain(void *p)
 					apr->pulsestepping = 0;
 		}
 
+		tick = getms();
+		if(tick-lasttick >= TIMESTEP){
+			lasttick = lasttick+TIMESTEP;
+			apr->cpa_clock_flag = 1;
+			recalc_cpa_req(apr);
+		}
+
 		apr->iobus.c12_prev = apr->iobus.c12;
 		apr->iobus.c34_prev = apr->iobus.c34;
 		apr->membus.c12_prev = apr->membus.c12;

src/main.c

@@ -528,6 +528,12 @@ findlayout(int *w, int *h)
 	*h = oppanel.pos.y + oppanel.surf->h;
 }
 
+u32
+getms(void)
+{
+	return SDL_GetTicks();
+}
+
 void
 usage(void)
 {

src/pdp6.h

@@ -118,6 +118,9 @@ typedef struct Busdev Busdev;
 typedef struct IOBus IOBus;
 typedef struct Apr Apr;
 
+u32 getms(void);
+
+
 /*
  * Memory
  */
@@ -269,7 +272,7 @@ struct IOBus
 	/* All IO devices connected to this bus */
 	Busdev dev[128];
 };
-void recalc_req(IOBus *bus);
+void setreq(IOBus *bus, int dev, u8 pia);
 
 
 /*

src/pt.c

@@ -12,27 +12,13 @@
 static void
 recalc_ptp_req(Ptp *ptp)
 {
-	u8 req;
+	setreq(ptp->bus, PTP, ptp->flag ? ptp->pia : 0);
-	IOBus *bus;
-	bus = ptp->bus;
-	req = ptp->flag ? ptp->pia : 0;
-	if(req != bus->dev[PTP].req){
-		bus->dev[PTP].req = req;
-		recalc_req(bus);
-	}
 }
 
 static void
 recalc_ptr_req(Ptr *ptr)
 {
-	u8 req;
+	setreq(ptr->bus, PTR, ptr->flag ? ptr->pia : 0);
-	IOBus *bus;
-	bus = ptr->bus;
-	req = ptr->flag ? ptr->pia : 0;
-	if(req != bus->dev[PTR].req){
-		bus->dev[PTR].req = req;
-		recalc_req(bus);
-	}
 }
 
 /* We have to punch after DATAO SET has happened. But BUSY is set by

src/tty.c

@@ -10,14 +10,7 @@
 static void
 recalc_tty_req(Tty *tty)
 {
-	u8 req;
+	setreq(tty->bus, TTY, tty->tto_flag || tty->tti_flag ? tty->pia : 0);
-	IOBus *bus;
-	bus = tty->bus;
-	req = tty->tto_flag || tty->tti_flag ? tty->pia : 0;
-	if(req != bus->dev[TTY].req){
-		bus->dev[TTY].req = req;
-		recalc_req(bus);
-	}
 }
 
 static void*

tools/as6.c

@@ -6,7 +6,7 @@
 #include <stdarg.h>
 #include "pdp6common.h"
 #include "pdp6bin.h"
-#include "../args.h"
+#include "../src/args.h"
 
 #define nil NULL
 
@@ -1586,6 +1586,9 @@ Ps pslist[] = {
 Op oplist[] = {
 	{ "Z",   Operator, 0 },
 
+	{ "UUO1",   Operator, 0001000000000 },
+	{ "UUO2",   Operator, 0002000000000 },
+
 	{ "FSC",   Operator, 0132000000000 },
 	{ "IBP",   Operator, 0133000000000 },
 	{ "ILDB",  Operator, 0134000000000 },
@@ -1962,14 +1965,14 @@ Op oplist[] = {
 	{ "CONSZ", IoOperator, 0700300000000 },
 	{ "CONSO", IoOperator, 0700340000000 },
 
-	{ "JEN",   Operator, 0254500000000 },
+	{ "JEN",   Operator, 0254500000000 },	/* JRST 12, */
-	{ "HALT",  Operator, 0254200000000 },
+	{ "HALT",  Operator, 0254200000000 },	/* JRST 4, */
-	{ "JRSTF", Operator, 0254100000000 },
+	{ "JRSTF", Operator, 0254100000000 },	/* JRST 2, */
-	{ "JOV",   Operator, 0255400000000 },
+	{ "JOV",   Operator, 0255400000000 },	/* JFCL 10, */
-	{ "JCRY0", Operator, 0255200000000 },
+	{ "JCRY0", Operator, 0255200000000 },	/* JFCL 4, */
-	{ "JCRY1", Operator, 0255100000000 },
+	{ "JCRY1", Operator, 0255100000000 },	/* JFCL 2, */
-	{ "JCRY",  Operator, 0255300000000 },
+	{ "JCRY",  Operator, 0255300000000 },	/* JFCL 6, */
-	{ "JFOV",  Operator, 0255040000000 },
+	{ "JFOV",  Operator, 0255040000000 },	/* JFCL 1, */
 	{ "RSW", IoOperator, 0700040000000 },
 
 	{ "", 0, 0 }