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fixed two bugs

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This commit is contained in:
aap 2016-11-08 00:09:55 +01:00
parent 0cdb02a439
commit 5d0ee59ab9
3 changed files with 13 additions and 17 deletions
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4
code/main.s
View File

@ -18,12 +18,12 @@ SP: XWD -100,PDL-1
START: MOVE PDP,SP
UUO1 123
CONO CPA,2001
CONO PRS,2300
JRST .
; UUO1 123
MOVSI AC2,440700
HRRI AC2,MSG
PUSHJ PDP,PUTS

24
src/apr.c
View File

@ -251,14 +251,6 @@ ar_cry_in(Apr *apr, word c)
ar_cry(apr);
}
void
set_ex_mode_sync(Apr *apr, bool value)
{
apr->ex_mode_sync = value;
if(apr->ex_mode_sync)
apr->ex_user = 1; // 5-13
}
void
set_pi_cyc(Apr *apr, bool value)
{
@ -509,7 +501,7 @@ pulse(ar_flag_set){
apr->ar_pc_chg_flag = !!(apr->mb & F3); // 6-10
apr->chf7 = !!(apr->mb & F4); // 6-19
if(apr->mb & F5)
set_ex_mode_sync(apr, 1); // 5-13
apr->ex_mode_sync = 1; // 5-13
recalc_cpa_req(apr);
}
@ -574,9 +566,11 @@ pulse(mr_clr){
apr->mc_stop_sync = 0; // 7-9
apr->mc_split_cyc_sync = 0; // 7-9
set_ex_mode_sync(apr, 0); // 5-13
if(apr->ex_mode_sync)
apr->ex_user = 1; // 5-13
apr->ex_mode_sync = 0;
apr->ex_uuo_sync = 0; // 5-13
apr->ex_pi_sync = 0; // 5-13
apr->ex_pi_sync = apr->pi_cyc; // 5-13
apr->a_long = 0; // ?? nowhere to be found
apr->ar_com_cont = 0; // 6-9
@ -653,9 +647,8 @@ pulse(mr_start){
pulse(mr_pwr_clr){
trace("MR PWR CLR\n");
apr->run = 0; // 5-1
/* order matters because of EX PI SYNC,
/* order seems to matter.
* better call directly before external pulses can trigger stuff */
// TODO: is this correct then?
mr_start(apr); // 5-2
mr_clr(apr); // 5-2
}
@ -2410,7 +2403,7 @@ pulse(et1){
apr->mb &= RT; // 6-3
}
if(apr->ir_jrst && apr->ir & H12)
set_ex_mode_sync(apr, 1); // 5-13
apr->ex_mode_sync = 1; // 5-13
if(apr->ir_jrst && apr->ir & H11)
ar_flag_set(apr); // 6-10
if(PI_RST)
@ -3073,6 +3066,9 @@ aprmain(void *p)
apr->nnextpulses = 0;
apr->ia_inh = 0;
// must clear lest EX USER be set by MR CLR after MR START
apr->ex_mode_sync = 0;
apr->membus.c12 = 0;
apr->membus.c34 = 0;
apr->iobus.c12 = 0;

2
tools/as6.c
View File

@ -1972,7 +1972,7 @@ Op oplist[] = {
{ "JCRY0", Operator, 0255200000000 }, /* JFCL 4, */
{ "JCRY1", Operator, 0255100000000 }, /* JFCL 2, */
{ "JCRY", Operator, 0255300000000 }, /* JFCL 6, */
{ "JFOV", Operator, 0255040000000 }, /* JFCL 1, */
{ "JPC", Operator, 0255040000000 }, /* JFCL 1, */
{ "RSW", IoOperator, 0700040000000 },
{ "", 0, 0 }