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moved iobus into apr

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This commit is contained in:
aap 2016-10-26 22:44:12 +02:00
parent 3b09b5f613
commit 783eb935de
5 changed files with 320 additions and 276 deletions
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216
src/apr.c
View File

@ -1,20 +1,12 @@
#include "pdp6.h"
#include <unistd.h>
word iobus0, iobus1;
word iobus1_last, iobus1_pulse;
int iodev;
#define DBG_AR debug("AR: %012llo\n", apr->ar)
#define DBG_MB debug("MB: %012llo\n", apr->mb)
#define DBG_MQ debug("MQ: %012llo\n", apr->mq)
#define DBG_MA debug("MA: %06o\n", apr->ma)
#define DBG_IR debug("IR: %06o\n", apr->ir)
Apr apr;
int pulsestepping = 0;
#define SWAPLTRT(a) (a = (a)<<18 & LT | (a)>>18 & RT)
#define CONS(a, b) ((a)&LT | (b)&RT)
@ -163,14 +155,14 @@ decodeir(Apr *apr)
apr->io_inst = apr->ir & 0700340;
// 5-7
iobus1 &= ~037777000000LL;
iobus1 |= apr->ir & H3 ? IOBUS_IOS3_1 : IOBUS_IOS3_0;
iobus1 |= apr->ir & H4 ? IOBUS_IOS4_1 : IOBUS_IOS4_0;
iobus1 |= apr->ir & H5 ? IOBUS_IOS5_1 : IOBUS_IOS5_0;
iobus1 |= apr->ir & H6 ? IOBUS_IOS6_1 : IOBUS_IOS6_0;
iobus1 |= apr->ir & H7 ? IOBUS_IOS7_1 : IOBUS_IOS7_0;
iobus1 |= apr->ir & H8 ? IOBUS_IOS8_1 : IOBUS_IOS8_0;
iobus1 |= apr->ir & H9 ? IOBUS_IOS9_1 : IOBUS_IOS9_0;
apr->iobus.c34 &= ~037777000000LL;
apr->iobus.c34 |= apr->ir & H3 ? IOBUS_IOS3_1 : IOBUS_IOS3_0;
apr->iobus.c34 |= apr->ir & H4 ? IOBUS_IOS4_1 : IOBUS_IOS4_0;
apr->iobus.c34 |= apr->ir & H5 ? IOBUS_IOS5_1 : IOBUS_IOS5_0;
apr->iobus.c34 |= apr->ir & H6 ? IOBUS_IOS6_1 : IOBUS_IOS6_0;
apr->iobus.c34 |= apr->ir & H7 ? IOBUS_IOS7_1 : IOBUS_IOS7_0;
apr->iobus.c34 |= apr->ir & H8 ? IOBUS_IOS8_1 : IOBUS_IOS8_0;
apr->iobus.c34 |= apr->ir & H9 ? IOBUS_IOS9_1 : IOBUS_IOS9_0;
apr->ir_fp = (apr->inst & 0740) == 0140;
@ -325,14 +317,14 @@ set_pih(Apr *apr, int pih)
/* Recalculate the PI requests on the IO bus from each device */
void
recalc_req(void)
recalc_req(IOBus *bus)
{
int i;
int req;
req = 0;
for(i = 0; i < 128; i++)
req |= iobus[i].pireq;
iobus1 = iobus1&~0177LL | req&0177;
req |= bus->dev[i].req;
bus->c34 = bus->c34&~0177LL | req&0177;
}
void
@ -345,9 +337,9 @@ recalc_cpa_req(Apr *apr)
apr->ar_pc_chg_flag && apr->cpa_pc_chg_enable ||
apr->ar_ov_flag && apr->cpa_arov_enable)
req = apr->cpa_pia;
if(iobus[CPA].pireq != req){
iobus[CPA].pireq = req;
recalc_req();
if(apr->iobus.dev[CPA].req != req){
apr->iobus.dev[CPA].req = req;
recalc_req(&apr->iobus);
}
}
@ -615,15 +607,15 @@ pulse(ex_clr){
}
pulse(ex_set){
apr->pr = iobus0>>28 & 0377; // 7-4
apr->rlr = iobus0>>10 & 0377; // 7-5
apr->pr = apr->iobus.c12>>28 & 0377; // 7-4
apr->rlr = apr->iobus.c12>>10 & 0377; // 7-5
}
pulse(mr_start){
trace("MR START\n");
// 8-1
iobus1 |= IOBUS_IOB_RESET;
apr->iobus.c34 |= IOBUS_IOB_RESET;
// 8-5
apr->cpa_iot_user = 0;
@ -635,7 +627,7 @@ pulse(mr_start){
apr->cpa_pdl_ov = 0;
apr->cpa_arov_enable = 0;
apr->cpa_pia = 0;
iobus[CPA].pireq = 0;
apr->iobus.dev[CPA].req = 0;
// PI
apr->pi_ov = 0; // 8-4
@ -665,40 +657,42 @@ void
wake_cpa(void *dev)
{
Apr *apr;
IOBus *bus;
apr = dev;
if(iodev != CPA)
bus = &apr->iobus;
if(apr->iobus.devcode != CPA)
return;
// 8-5
if(IOB_STATUS){
if(apr->cpa_pdl_ov) iobus0 |= F19;
if(apr->cpa_iot_user) iobus0 |= F20;
if(apr->ex_user) iobus0 |= F21;
if(apr->cpa_illeg_op) iobus0 |= F22;
if(apr->cpa_non_exist_mem) iobus0 |= F23;
if(apr->cpa_clock_enable) iobus0 |= F25;
if(apr->cpa_clock_flag) iobus0 |= F26;
if(apr->cpa_pc_chg_enable) iobus0 |= F28;
if(apr->ar_pc_chg_flag) iobus0 |= F29;
if(apr->cpa_arov_enable) iobus0 |= F31;
if(apr->ar_ov_flag) iobus0 |= F32;
iobus0 |= apr->cpa_pia & 7;
if(apr->cpa_pdl_ov) bus->c12 |= F19;
if(apr->cpa_iot_user) bus->c12 |= F20;
if(apr->ex_user) bus->c12 |= F21;
if(apr->cpa_illeg_op) bus->c12 |= F22;
if(apr->cpa_non_exist_mem) bus->c12 |= F23;
if(apr->cpa_clock_enable) bus->c12 |= F25;
if(apr->cpa_clock_flag) bus->c12 |= F26;
if(apr->cpa_pc_chg_enable) bus->c12 |= F28;
if(apr->ar_pc_chg_flag) bus->c12 |= F29;
if(apr->cpa_arov_enable) bus->c12 |= F31;
if(apr->ar_ov_flag) bus->c12 |= F32;
bus->c12 |= apr->cpa_pia & 7;
}
if(IOB_CONO_SET){
if(iobus0 & F18) apr->cpa_pdl_ov = 0;
if(iobus0 & F19) iobus1 |= IOBUS_IOB_RESET; // 8-1
if(iobus0 & F22) apr->cpa_illeg_op = 0;
if(iobus0 & F23) apr->cpa_non_exist_mem = 0;
if(iobus0 & F24) apr->cpa_clock_enable = 0;
if(iobus0 & F25) apr->cpa_clock_enable = 1;
if(iobus0 & F26) apr->cpa_clock_flag = 0;
if(iobus0 & F27) apr->cpa_pc_chg_enable = 0;
if(iobus0 & F28) apr->cpa_pc_chg_enable = 1;
if(iobus0 & F29) apr->ar_pc_chg_flag = 0; // 6-10
if(iobus0 & F30) apr->cpa_arov_enable = 0;
if(iobus0 & F31) apr->cpa_arov_enable = 1;
if(iobus0 & F32) apr->ar_ov_flag = 0; // 6-10
apr->cpa_pia = iobus0 & 7;
if(bus->c12 & F18) apr->cpa_pdl_ov = 0;
if(bus->c12 & F19) bus->c34 |= IOBUS_IOB_RESET; // 8-1
if(bus->c12 & F22) apr->cpa_illeg_op = 0;
if(bus->c12 & F23) apr->cpa_non_exist_mem = 0;
if(bus->c12 & F24) apr->cpa_clock_enable = 0;
if(bus->c12 & F25) apr->cpa_clock_enable = 1;
if(bus->c12 & F26) apr->cpa_clock_flag = 0;
if(bus->c12 & F27) apr->cpa_pc_chg_enable = 0;
if(bus->c12 & F28) apr->cpa_pc_chg_enable = 1;
if(bus->c12 & F29) apr->ar_pc_chg_flag = 0; // 6-10
if(bus->c12 & F30) apr->cpa_arov_enable = 0;
if(bus->c12 & F31) apr->cpa_arov_enable = 1;
if(bus->c12 & F32) apr->ar_ov_flag = 0; // 6-10
apr->cpa_pia = bus->c12 & 7;
recalc_cpa_req(apr);
}
@ -716,35 +710,37 @@ void
wake_pi(void *dev)
{
Apr *apr;
IOBus *bus;
apr = dev;
if(iodev != PI)
bus = &apr->iobus;
if(bus->devcode != PI)
return;
// 8-4, 8-5
if(IOB_STATUS){
trace("PI STATUS %llo\n", iobus0);
if(apr->pi_active) iobus0 |= F28;
iobus0 |= apr->pio;
trace("PI STATUS %llo\n", bus->c12);
if(apr->pi_active) bus->c12 |= F28;
bus->c12 |= apr->pio;
}
// 8-4, 8-3
if(IOB_CONO_CLEAR){
trace("PI CONO CLEAR %llo\n", iobus0);
if(iobus0 & F23)
trace("PI CONO CLEAR %llo\n", bus->c12);
if(bus->c12 & F23)
// can call directly
pi_reset(apr);
}
if(IOB_CONO_SET){
trace("PI CONO SET %llo\n", iobus0);
if(iobus0 & F24)
set_pir(apr, apr->pir | iobus0&0177);
if(iobus0 & F25)
apr->pio |= iobus0&0177;
if(iobus0 & F26)
apr->pio &= ~(iobus0&0177);
if(iobus0 & F27)
trace("PI CONO SET %llo\n", bus->c12);
if(bus->c12 & F24)
set_pir(apr, apr->pir | bus->c12&0177);
if(bus->c12 & F25)
apr->pio |= bus->c12&0177;
if(bus->c12 & F26)
apr->pio &= ~(bus->c12&0177);
if(bus->c12 & F27)
apr->pi_active = 0;
if(iobus0 & F28)
if(bus->c12 & F28)
apr->pi_active = 1;
}
}
@ -757,9 +753,9 @@ wake_pi(void *dev)
pulse(iot_t4){
trace("IOT T4\n");
/* Clear what was set in IOT T2 */
iobus1 &= ~(IOBUS_IOB_STATUS | IOBUS_IOB_DATAI);
apr->iobus.c34 &= ~(IOBUS_IOB_STATUS | IOBUS_IOB_DATAI);
/* and do something like IOB BUS RESET */
iobus0 = 0;
apr->iobus.c12 = 0;
}
pulse(iot_t3a){
@ -774,10 +770,10 @@ pulse(iot_t3){
// 8-1
/* Pulses, cleared in the main loop. */
if(IOT_DATAO)
iobus1 |= IOBUS_DATAO_SET;
apr->iobus.c34 |= IOBUS_DATAO_SET;
if(IOT_CONO)
iobus1 |= IOBUS_CONO_SET;
apr->ar |= iobus0; // 6-8
apr->iobus.c34 |= IOBUS_CONO_SET;
apr->ar |= apr->iobus.c12; // 6-8
nextpulse(apr, et5); // 5-5
}
@ -788,16 +784,16 @@ pulse(iot_t2){
/* These are asserted during INIT SETUP, IOT T2 and FINAL SETUP.
* We clear them in IOT T4 which happens after FINAL SETUP */
if(IOT_OUTGOING)
iobus0 |= apr->ar;
apr->iobus.c12 |= apr->ar;
if(IOT_STATUS)
iobus1 |= IOBUS_IOB_STATUS;
apr->iobus.c34 |= IOBUS_IOB_STATUS;
if(IOT_DATAI)
iobus1 |= IOBUS_IOB_DATAI;
apr->iobus.c34 |= IOBUS_IOB_DATAI;
/* Pulses, cleared in the main loop. */
if(IOT_DATAO)
iobus1 |= IOBUS_DATAO_CLEAR;
apr->iobus.c34 |= IOBUS_DATAO_CLEAR;
if(IOT_CONO)
iobus1 |= IOBUS_CONO_CLEAR;
apr->iobus.c34 |= IOBUS_CONO_CLEAR;
nextpulse(apr, iot_t3);
nextpulse(apr, iot_t3a);
}
@ -2066,7 +2062,7 @@ pulse(xct_t0){
pulse(pir_stb){
trace("PIR STB\n");
set_pir(apr, apr->pir | apr->pio & iobus1); // 8-3
set_pir(apr, apr->pir | apr->pio & apr->iobus.c34); // 8-3
}
pulse(pi_sync){
@ -3029,8 +3025,18 @@ nextpulse(Apr *apr, Pulse *p)
void
initapr(Apr *apr)
{
iobus[CPA] = (Busdev){ apr, wake_cpa, 0 };
iobus[PI] = (Busdev){ apr, wake_pi, 0 };
apr->iobus.dev[CPA] = (Busdev){ apr, wake_cpa, 0 };
apr->iobus.dev[PI] = (Busdev){ apr, wake_pi, 0 };
}
/* find out which bits were turned on */
void
updatebus(void *bus)
{
IOBus *b;
b = bus;
b->c12_pulse = (b->c12_prev ^ b->c12) & b->c12;
b->c34_pulse = (b->c34_prev ^ b->c34) & b->c34;
}
void*
@ -3039,7 +3045,7 @@ aprmain(void *p)
Apr *apr;
Busdev *dev;
Pulse **tmp;
int i;
int i, devcode;
apr = (Apr*)p;
apr->clist = apr->pulses1;
@ -3048,8 +3054,8 @@ aprmain(void *p)
apr->nnextpulses = 0;
apr->ia_inh = 0;
iobus0 = 0;
iobus1 = 0;
apr->iobus.c12 = 0;
apr->iobus.c34 = 0;
nextpulse(apr, mr_pwr_clr);
while(apr->sw_power){
@ -3057,22 +3063,21 @@ aprmain(void *p)
apr->nnextpulses = 0;
tmp = apr->clist; apr->clist = apr->nlist; apr->nlist = tmp;
if(pulsestepping){
if(apr->pulsestepping){
int c;
while(c = getchar(), c != EOF && c != '\n')
if(c == 'x')
pulsestepping = 0;
apr->pulsestepping = 0;
}
iobus1_last = iobus1;
apr->iobus.c12_prev = apr->iobus.c12;
apr->iobus.c34_prev = apr->iobus.c34;
membus0_last = membus0;
for(i = 0; i < apr->ncurpulses; i++)
apr->clist[i](apr);
/* find out which bits were turned on */
iobus1_pulse = (iobus1_last ^ iobus1) & iobus1;
iobus1_pulse &= ~037777000177LL;
updatebus(&apr->iobus);
membus0_pulse = (membus0_last ^ membus0) & membus0;
/* This is simplified, we have no IOT RESET,
@ -3096,29 +3101,30 @@ aprmain(void *p)
/* Pulses and signals through IO bus */
iodev = -1;
if(iobus1_pulse & (IOBUS_PULSES | IOBUS_IOB_STATUS | IOBUS_IOB_DATAI)){
iodev = 0;
if(iobus1 & IOBUS_IOS3_1) iodev |= 0100;
if(iobus1 & IOBUS_IOS4_1) iodev |= 0040;
if(iobus1 & IOBUS_IOS5_1) iodev |= 0020;
if(iobus1 & IOBUS_IOS6_1) iodev |= 0010;
if(iobus1 & IOBUS_IOS7_1) iodev |= 0004;
if(iobus1 & IOBUS_IOS8_1) iodev |= 0002;
if(iobus1 & IOBUS_IOS9_1) iodev |= 0001;
dev = &iobus[iodev];
apr->iobus.devcode = -1;
if(apr->iobus.c34_pulse & (IOBUS_PULSES | IOBUS_IOB_STATUS | IOBUS_IOB_DATAI)){
devcode = 0;
if(apr->iobus.c34 & IOBUS_IOS3_1) devcode |= 0100;
if(apr->iobus.c34 & IOBUS_IOS4_1) devcode |= 0040;
if(apr->iobus.c34 & IOBUS_IOS5_1) devcode |= 0020;
if(apr->iobus.c34 & IOBUS_IOS6_1) devcode |= 0010;
if(apr->iobus.c34 & IOBUS_IOS7_1) devcode |= 0004;
if(apr->iobus.c34 & IOBUS_IOS8_1) devcode |= 0002;
if(apr->iobus.c34 & IOBUS_IOS9_1) devcode |= 0001;
apr->iobus.devcode = devcode;
dev = &apr->iobus.dev[devcode];
if(dev->wake)
dev->wake(dev->dev);
}
if(iobus1_pulse & IOBUS_IOB_RESET){
if(apr->iobus.c34_pulse & IOBUS_IOB_RESET){
int d;
for(d = 0; d < nelem(iobus); d++){
dev = &iobus[d];
for(d = 0; d < 128; d++){
dev = &apr->iobus.dev[d];
if(dev->wake)
dev->wake(dev->dev);
}
}
iobus1 &= ~(IOBUS_PULSES | IOBUS_IOB_RESET);
apr->iobus.c34 &= ~(IOBUS_PULSES | IOBUS_IOB_RESET);
/* Pulses to memory */

10
src/main.c
View File

@ -5,8 +5,6 @@
#include <pthread.h>
#include "args.h"
Busdev iobus[128];
typedef struct Point Point;
struct Point
{
@ -338,7 +336,7 @@ updateapr(Apr *apr, Ptr *ptr)
setlights(apr->pr, pr_l, 8);
setlights(apr->rlr, rlr_l, 8);
setlights(apr->rla, rla_l, 8);
setlights(iobus0, iobus_l, 36);
setlights(apr->iobus.c12, iobus_l, 36);
}
void
@ -663,9 +661,9 @@ main(int argc, char *argv[])
initapr(&apr);
initmem();
inittty(&tty);
initptr(&ptr);
initptp(&ptp);
inittty(&tty, &apr.iobus);
initptr(&ptr, &apr.iobus);
initptp(&ptp, &apr.iobus);
for(;;){
start = SDL_GetTicks();

237
src/pdp6.h
View File

@ -21,6 +21,10 @@ extern int dotrace;
void trace(char *fmt, ...);
void debug(char *fmt, ...);
enum {
MAXPULSE = 5
};
enum Mask {
FW = 0777777777777,
RT = 0000000777777,
@ -102,16 +106,131 @@ enum Opcode {
};
/*
* Memory
*/
void initmem(void);
void dumpmem(void);
void wakemem(void);
// 7-2, 7-10
enum {
MAXPULSE = 5
MEMBUS_MA21 = 0000000000001,
MEMBUS_WR_RQ = 0000000000004,
MEMBUS_RD_RQ = 0000000000010,
MEMBUS_MA_FMC_SEL0 = 0000001000000,
MEMBUS_MA_FMC_SEL1 = 0000002000000,
MEMBUS_MA35_0 = 0000004000000,
MEMBUS_MA35_1 = 0000010000000,
MEMBUS_MA21_0 = 0000020000000,
MEMBUS_MA21_1 = 0000040000000,
MEMBUS_MA20_0 = 0000100000000,
MEMBUS_MA20_1 = 0000200000000,
MEMBUS_MA19_0 = 0000400000000,
MEMBUS_MA19_1 = 0001000000000,
MEMBUS_MA18_0 = 0002000000000,
MEMBUS_MA18_1 = 0004000000000,
MEMBUS_RQ_CYC = 0020000000000,
MEMBUS_WR_RS = 0100000000000,
MEMBUS_MAI_RD_RS = 0200000000000,
MEMBUS_MAI_ADDR_ACK = 0400000000000,
};
/* 0 is cable 1 & 2 (above bits); 1 is cable 3 & 4 (data) */
extern word membus0, membus1;
/* record the state of membus0 of the last pulse step
* to recognize pulses or edges */
extern word membus0_last, membus0_pulse;
/*
* IO bus
*/
// 7-10
enum {
IOBUS_PI_REQ_7 = F35,
IOBUS_PI_REQ_6 = F34,
IOBUS_PI_REQ_5 = F33,
IOBUS_PI_REQ_4 = F32,
IOBUS_PI_REQ_3 = F31,
IOBUS_PI_REQ_2 = F30,
IOBUS_PI_REQ_1 = F29,
IOBUS_IOB_STATUS = F23,
IOBUS_IOB_DATAI = F22,
IOBUS_CONO_SET = F21,
IOBUS_CONO_CLEAR = F20,
IOBUS_DATAO_SET = F19,
IOBUS_DATAO_CLEAR = F18,
IOBUS_IOS9_1 = F17,
IOBUS_IOS9_0 = F16,
IOBUS_IOS8_1 = F15,
IOBUS_IOS8_0 = F14,
IOBUS_IOS7_1 = F13,
IOBUS_IOS7_0 = F12,
IOBUS_IOS6_1 = F11,
IOBUS_IOS6_0 = F10,
IOBUS_IOS5_1 = F9,
IOBUS_IOS5_0 = F8,
IOBUS_IOS4_1 = F7,
IOBUS_IOS4_0 = F6,
IOBUS_IOS3_1 = F5,
IOBUS_IOS3_0 = F4,
IOBUS_MC_DR_SPLIT = F3,
IOBUS_POWER_ON = F1,
IOBUS_IOB_RESET = F0,
IOBUS_PULSES = IOBUS_CONO_SET | IOBUS_CONO_CLEAR |
IOBUS_DATAO_SET | IOBUS_DATAO_CLEAR
};
#define IOB_RESET (bus->c34 & IOBUS_IOB_RESET)
#define IOB_DATAO_CLEAR (bus->c34 & IOBUS_DATAO_CLEAR)
#define IOB_DATAO_SET (bus->c34 & IOBUS_DATAO_SET)
#define IOB_CONO_CLEAR (bus->c34 & IOBUS_CONO_CLEAR)
#define IOB_CONO_SET (bus->c34 & IOBUS_CONO_SET)
#define IOB_STATUS (bus->c34 & IOBUS_IOB_STATUS)
#define IOB_DATAI (bus->c34 & IOBUS_IOB_DATAI)
/* A peripheral device connected to an IO bus */
typedef struct Busdev Busdev;
struct Busdev
{
void *dev;
void (*wake)(void *dev);
u8 req;
};
typedef struct IOBus IOBus;
struct IOBus
{
/* c12 are cables 1 and 2, c34 3 and 4.
* c??_prev records the previous state of the bus
* and c??_pulse is used to detect leading edges. */
word c12, c12_prev, c12_pulse;
word c34, c34_prev, c34_pulse;
/* device code decoded from the cables */
int devcode;
/* All IO devices connected to this bus */
Busdev dev[128];
};
void recalc_req(IOBus *bus);
/*
* Devices
*/
/* Arithmetic Processor 166 */
#define CPA (0000>>2)
#define PI (0004>>2)
typedef struct Apr Apr;
typedef void Pulse(Apr *apr);
#define pulse(p) static void p(Apr *apr)
struct Apr {
struct Apr
{
IOBus iobus;
hword ir;
word mi;
word data;
@ -210,121 +329,23 @@ struct Apr {
/* needed for the emulation */
int extpulse;
bool ia_inh; // this is asserted for some time
int pulsestepping;
Pulse *pulses1[MAXPULSE], *pulses2[MAXPULSE];
Pulse **clist, **nlist;
int ncurpulses, nnextpulses;
};
void initapr(Apr *apr);
void nextpulse(Apr *apr, Pulse *p);
void *aprmain(void *p);
void initmem(void);
void dumpmem(void);
void wakemem(void);
// 7-2, 7-10
enum {
MEMBUS_MA21 = 0000000000001,
MEMBUS_WR_RQ = 0000000000004,
MEMBUS_RD_RQ = 0000000000010,
MEMBUS_MA_FMC_SEL0 = 0000001000000,
MEMBUS_MA_FMC_SEL1 = 0000002000000,
MEMBUS_MA35_0 = 0000004000000,
MEMBUS_MA35_1 = 0000010000000,
MEMBUS_MA21_0 = 0000020000000,
MEMBUS_MA21_1 = 0000040000000,
MEMBUS_MA20_0 = 0000100000000,
MEMBUS_MA20_1 = 0000200000000,
MEMBUS_MA19_0 = 0000400000000,
MEMBUS_MA19_1 = 0001000000000,
MEMBUS_MA18_0 = 0002000000000,
MEMBUS_MA18_1 = 0004000000000,
MEMBUS_RQ_CYC = 0020000000000,
MEMBUS_WR_RS = 0100000000000,
MEMBUS_MAI_RD_RS = 0200000000000,
MEMBUS_MAI_ADDR_ACK = 0400000000000,
};
/* 0 is cable 1 & 2 (above bits); 1 is cable 3 & 4 (data) */
extern word membus0, membus1;
/* record the state of membus0 of the last pulse step
* to recognize pulses or edges */
extern word membus0_last, membus0_pulse;
// 7-10
enum {
IOBUS_PI_REQ_7 = F35,
IOBUS_PI_REQ_6 = F34,
IOBUS_PI_REQ_5 = F33,
IOBUS_PI_REQ_4 = F32,
IOBUS_PI_REQ_3 = F31,
IOBUS_PI_REQ_2 = F30,
IOBUS_PI_REQ_1 = F29,
IOBUS_IOB_STATUS = F23,
IOBUS_IOB_DATAI = F22,
IOBUS_CONO_SET = F21,
IOBUS_CONO_CLEAR = F20,
IOBUS_DATAO_SET = F19,
IOBUS_DATAO_CLEAR = F18,
IOBUS_IOS9_1 = F17,
IOBUS_IOS9_0 = F16,
IOBUS_IOS8_1 = F15,
IOBUS_IOS8_0 = F14,
IOBUS_IOS7_1 = F13,
IOBUS_IOS7_0 = F12,
IOBUS_IOS6_1 = F11,
IOBUS_IOS6_0 = F10,
IOBUS_IOS5_1 = F9,
IOBUS_IOS5_0 = F8,
IOBUS_IOS4_1 = F7,
IOBUS_IOS4_0 = F6,
IOBUS_IOS3_1 = F5,
IOBUS_IOS3_0 = F4,
IOBUS_MC_DR_SPLIT = F3,
IOBUS_POWER_ON = F1,
IOBUS_IOB_RESET = F0,
IOBUS_PULSES = IOBUS_CONO_SET | IOBUS_CONO_CLEAR |
IOBUS_DATAO_SET | IOBUS_DATAO_CLEAR
};
/* 0 is cable 1 & 2 (data); 1 is cable 3 & 4 (above bits) */
extern word iobus0, iobus1;
/* record the state of iobus1 of the last pulse step
* to recognize pulses or edges */
extern word iobus1_last, iobus1_pulse;
extern int iodev;
#define IOB_RESET (iobus1 & IOBUS_IOB_RESET)
#define IOB_DATAO_CLEAR (iobus1 & IOBUS_DATAO_CLEAR)
#define IOB_DATAO_SET (iobus1 & IOBUS_DATAO_SET)
#define IOB_CONO_CLEAR (iobus1 & IOBUS_CONO_CLEAR)
#define IOB_CONO_SET (iobus1 & IOBUS_CONO_SET)
#define IOB_STATUS (iobus1 & IOBUS_IOB_STATUS)
#define IOB_DATAI (iobus1 & IOBUS_IOB_DATAI)
typedef struct Busdev Busdev;
struct Busdev
{
void *dev;
void (*wake)(void *dev);
u8 pireq;
};
extern Busdev iobus[128];
void recalc_req(void);
/*
* Devices
*/
/* Arithmetic Processor 166 */
#define CPA (0000>>2)
#define PI (0004>>2)
void initapr(Apr *apr);
/* Paper tape punch 761 */
#define PTP (0100>>2)
typedef struct Ptp Ptp;
struct Ptp
{
IOBus *bus;
uchar ptp;
bool busy, flag, b;
int pia;
@ -332,13 +353,15 @@ struct Ptp
FILE *fp;
int waitdatao;
};
void initptp(Ptp *ptp);
void initptp(Ptp *ptp, IOBus *bus);
/* Paper tape reader 760 */
#define PTR (0104>>2)
typedef struct Ptr Ptr;
struct Ptr
{
IOBus *bus;
int motor_on;
word sr;
word ptr;
@ -347,21 +370,23 @@ struct Ptr
FILE *fp;
};
void initptr(Ptr *ptr);
void initptr(Ptr *ptr, IOBus *bus);
void ptr_setmotor(Ptr *ptr, int m);
/* Teletype 626 */
#define TTY (0120>>2)
typedef struct Tty Tty;
struct Tty
{
IOBus *bus;
uchar tto, tti;
bool tto_busy, tto_flag;
bool tti_busy, tti_flag;
int pia;
int fd;
};
void inittty(Tty *tty);
void inittty(Tty *tty, IOBus *bus);

80
src/pt.c
View File

@ -9,32 +9,36 @@
/* TODO? implement motor delays */
void
static void
recalc_ptp_req(Ptp *ptp)
{
u8 req;
IOBus *bus;
bus = ptp->bus;
req = ptp->flag ? ptp->pia : 0;
if(req != iobus[PTP].pireq){
iobus[PTP].pireq = req;
recalc_req();
if(req != bus->dev[PTP].req){
bus->dev[PTP].req = req;
recalc_req(bus);
}
}
void
static void
recalc_ptr_req(Ptr *ptr)
{
u8 req;
IOBus *bus;
bus = ptr->bus;
req = ptr->flag ? ptr->pia : 0;
if(req != iobus[PTR].pireq){
iobus[PTR].pireq = req;
recalc_req();
if(req != bus->dev[PTR].req){
bus->dev[PTR].req = req;
recalc_req(bus);
}
}
/* We have to punch after DATAO SET has happened. But BUSY is set by
* DATAO CLEAR. So we use waitdatao to record when SET has happened */
void*
static void*
ptpthread(void *dev)
{
Ptp *ptp;
@ -57,7 +61,7 @@ ptpthread(void *dev)
return nil;
}
void*
static void*
ptrthread(void *dev)
{
Ptr *ptr;
@ -100,20 +104,22 @@ static void
wake_ptp(void *dev)
{
Ptp *ptp;
IOBus *bus;
ptp = dev;
bus = ptp->bus;
if(IOB_RESET){
ptp->pia = 0;
ptp->busy = 0;
ptp->flag = 0;
ptp->b = 0;
}
if(iodev == PTP){
if(bus->devcode == PTP){
if(IOB_STATUS){
if(ptp->b) iobus0 |= F30;
if(ptp->busy) iobus0 |= F31;
if(ptp->flag) iobus0 |= F32;
iobus0 |= ptp->pia & 7;
if(ptp->b) bus->c12 |= F30;
if(ptp->busy) bus->c12 |= F31;
if(ptp->flag) bus->c12 |= F32;
bus->c12 |= ptp->pia & 7;
}
if(IOB_CONO_CLEAR){
ptp->pia = 0;
@ -122,10 +128,10 @@ wake_ptp(void *dev)
ptp->b = 0;
}
if(IOB_CONO_SET){
if(iobus0 & F30) ptp->b = 1;
if(iobus0 & F31) ptp->busy = 1;
if(iobus0 & F32) ptp->flag = 1;
ptp->pia |= iobus0 & 7;
if(bus->c12 & F30) ptp->b = 1;
if(bus->c12 & F31) ptp->busy = 1;
if(bus->c12 & F32) ptp->flag = 1;
ptp->pia |= bus->c12 & 7;
}
if(IOB_DATAO_CLEAR){
ptp->ptp = 0;
@ -134,7 +140,7 @@ wake_ptp(void *dev)
ptp->waitdatao = 0;
}
if(IOB_DATAO_SET){
ptp->ptp = iobus0 & 0377;
ptp->ptp = bus->c12 & 0377;
ptp->waitdatao = 1;
}
}
@ -145,8 +151,10 @@ static void
wake_ptr(void *dev)
{
Ptr *ptr;
IOBus *bus;
ptr = dev;
bus = ptr->bus;
if(IOB_RESET){
ptr->pia = 0;
ptr->busy = 0;
@ -154,16 +162,16 @@ wake_ptr(void *dev)
ptr->b = 0;
}
if(iodev == PTR){
if(bus->devcode == PTR){
if(IOB_STATUS){
if(ptr->motor_on) iobus0 |= F27;
if(ptr->b) iobus0 |= F30;
if(ptr->busy) iobus0 |= F31;
if(ptr->flag) iobus0 |= F32;
iobus0 |= ptr->pia & 7;
if(ptr->motor_on) bus->c12 |= F27;
if(ptr->b) bus->c12 |= F30;
if(ptr->busy) bus->c12 |= F31;
if(ptr->flag) bus->c12 |= F32;
bus->c12 |= ptr->pia & 7;
}
if(IOB_DATAI){
iobus0 |= ptr->ptr;
bus->c12 |= ptr->ptr;
ptr->flag = 0;
// actually when DATAI is negated again
ptr->busy = 1;
@ -175,10 +183,10 @@ wake_ptr(void *dev)
ptr->b = 0;
}
if(IOB_CONO_SET){
if(iobus0 & F30) ptr->b = 1;
if(iobus0 & F31) ptr->busy = 1;
if(iobus0 & F32) ptr->flag = 1;
ptr->pia |= iobus0 & 7;
if(bus->c12 & F30) ptr->b = 1;
if(bus->c12 & F31) ptr->busy = 1;
if(bus->c12 & F32) ptr->flag = 1;
ptr->pia |= bus->c12 & 7;
}
}
recalc_ptr_req(ptr);
@ -197,20 +205,22 @@ ptr_setmotor(Ptr *ptr, int m)
}
void
initptp(Ptp *ptp)
initptp(Ptp *ptp, IOBus *bus)
{
pthread_t thread_id;
iobus[PTP] = (Busdev){ ptp, wake_ptp, 0 };
ptp->bus = bus;
bus->dev[PTP] = (Busdev){ ptp, wake_ptp, 0 };
pthread_create(&thread_id, nil, ptpthread, ptp);
ptp->fp = fopen("../code/ptp.out", "wb");
}
void
initptr(Ptr *ptr)
initptr(Ptr *ptr, IOBus *bus)
{
pthread_t thread_id;
iobus[PTR] = (Busdev){ ptr, wake_ptr, 0 };
ptr->bus = bus;
bus->dev[PTR] = (Busdev){ ptr, wake_ptr, 0 };
pthread_create(&thread_id, nil, ptrthread, ptr);
ptr->fp = fopen("../code/test.rim", "rb");

53
src/tty.c
View File

@ -7,18 +7,20 @@
#include <pthread.h>
#include <poll.h>
void
static void
recalc_tty_req(Tty *tty)
{
u8 req;
IOBus *bus;
bus = tty->bus;
req = tty->tto_flag || tty->tti_flag ? tty->pia : 0;
if(req != iobus[TTY].pireq){
iobus[TTY].pireq = req;
recalc_req();
if(req != bus->dev[TTY].req){
bus->dev[TTY].req = req;
recalc_req(bus);
}
}
void*
static void*
ttythread(void *dev)
{
int sockfd, newsockfd, portno, clilen;
@ -70,8 +72,10 @@ static void
wake_tty(void *dev)
{
Tty *tty;
IOBus *bus;
tty = dev;
bus = tty->bus;
if(IOB_RESET){
tty->pia = 0;
tty->tto_busy = 0;
@ -81,30 +85,30 @@ wake_tty(void *dev)
tty->tti_flag = 0;
tty->tti = 0;
}
if(iodev == TTY){
if(bus->devcode == TTY){
if(IOB_STATUS){
if(tty->tti_busy) iobus0 |= F29;
if(tty->tti_flag) iobus0 |= F30;
if(tty->tto_busy) iobus0 |= F31;
if(tty->tto_flag) iobus0 |= F32;
iobus0 |= tty->pia & 7;
if(tty->tti_busy) bus->c12 |= F29;
if(tty->tti_flag) bus->c12 |= F30;
if(tty->tto_busy) bus->c12 |= F31;
if(tty->tto_flag) bus->c12 |= F32;
bus->c12 |= tty->pia & 7;
}
if(IOB_DATAI){
iobus0 |= tty->tti;
bus->c12 |= tty->tti;
tty->tti_flag = 0;
}
if(IOB_CONO_CLEAR)
tty->pia = 0;
if(IOB_CONO_SET){
if(iobus0 & F25) tty->tti_busy = 0;
if(iobus0 & F26) tty->tti_flag = 0;
if(iobus0 & F27) tty->tto_busy = 0;
if(iobus0 & F28) tty->tto_flag = 0;
if(iobus0 & F29) tty->tti_busy = 1;
if(iobus0 & F30) tty->tti_flag = 1;
if(iobus0 & F31) tty->tto_busy = 1;
if(iobus0 & F32) tty->tto_flag = 1;
tty->pia |= iobus0 & 7;
if(bus->c12 & F25) tty->tti_busy = 0;
if(bus->c12 & F26) tty->tti_flag = 0;
if(bus->c12 & F27) tty->tto_busy = 0;
if(bus->c12 & F28) tty->tto_flag = 0;
if(bus->c12 & F29) tty->tti_busy = 1;
if(bus->c12 & F30) tty->tti_flag = 1;
if(bus->c12 & F31) tty->tto_busy = 1;
if(bus->c12 & F32) tty->tto_flag = 1;
tty->pia |= bus->c12 & 7;
}
if(IOB_DATAO_CLEAR){
tty->tto = 0;
@ -112,7 +116,7 @@ wake_tty(void *dev)
tty->tto_flag = 0;
}
if(IOB_DATAO_SET){
tty->tto = iobus0 & 0377;
tty->tto = bus->c12 & 0377;
if(tty->fd >= 0){
tty->tto &= ~0200;
write(tty->fd, &tty->tto, 1);
@ -126,10 +130,11 @@ wake_tty(void *dev)
}
void
inittty(Tty *tty)
inittty(Tty *tty, IOBus *bus)
{
pthread_t thread_id;
tty->fd = -1;
iobus[TTY] = (Busdev){ tty, wake_tty, 0 };
tty->bus = bus;
bus->dev[TTY] = (Busdev){ tty, wake_tty, 0 };
pthread_create(&thread_id, nil, ttythread, tty);
}