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verilog: passing diags part1
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@@ -779,7 +779,7 @@ module apr(
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/* FWT */
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wire fwt_swap = ir_fwt & ir[5:6] == 1;
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wire fwt_negate = ir_fwt_movn_m & (ir[6] | ar[0]);
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wire fwt_negate = ir_fwt_movn_m & (~ir[6] | ar[0]);
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wire fwt_00 = ir_fwt & ir[7:8] == 0;
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wire fwt_01 = ir_fwt & ir[7:8] == 1;
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wire fwt_10 = ir_fwt & ir[7:8] == 2;
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@@ -895,8 +895,8 @@ module apr(
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iot_conso & ~ar_eq_0 |
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iot_consz & ar_eq_0;
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wire selected_flag = ar_ov_flag & ir[9] |
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ar_cry0 & ir[10] |
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ar_cry1 & ir[11] |
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ar_cry0_flag & ir[10] |
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ar_cry1_flag & ir[11] |
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ar_pc_chg_flag & ir[12];
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wire pc_set_enable = memac_ac & accp_etal_test |
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ir_aobjn & ar[0] |
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@@ -1119,40 +1119,47 @@ module apr(
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wire shc_lshc_OR_div = ir_lshc | shc_div;
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wire shc_div = (ir_div | ir_fdv) & ~nrf2;
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// ET0
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wire ar_clr_et0 = boole_0 | boole_3 | boole_14 | boole_17;
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wire ar_com_et0 = boole_2 | boole_4 |
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boole_12 | boole_13 | boole_15;
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wire ar_fm_mbJ_et0 = hwt_11 | fwt_00 | fwt_11 |
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memac_mem | iot_blk | iot_datao;
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// ET1
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wire ar_fm_mb0_et1 = boole_1 | boole_2 | boole_15 | boole_16;
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wire ar_fm_mb1_et1 = boole_3 | boole_4 | boole_7 |
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boole_10 | boole_13 | acbm_set;
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wire ar_fm_mb_xor_et1 = boole_6 | boole_11 | boole_14 | acbm_com;
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wire ar_clr_et1 = hwt_ar_clr | iot_status | iot_datai;
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// ET4
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wire ar_com_et4 = boole_4 | boole_10 | boole_11 | boole_14 |
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boole_15 | boole_16 | boole_17;
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wire ar_fm_mbltJ_et4 = hwt_lt | iot_cono;
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wire ar_fm_mbrtJ_et4 = hwt_rt;
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// ET5
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wire ar_com_et5 = ir_acbm;
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// ET6
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wire ar_fm_mb0_et6 = iot_consz | iot_conso;
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// ET7
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wire ar_com_et7 = ir_acbm;
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wire ar_clr = dst2 | fat6 |
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et0a & ar_clr_et0 |
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et1 & ar_clr_et1 |
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mst1_D0;
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wire ar_clr_et0 = boole_0 | boole_3 | boole_14 | boole_17;
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wire ar_clr_et1 = hwt_ar_clr | iot_status | iot_datai;
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wire ar_com = ar_incdec_t0 | ar_negate_t0 |
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et0a & ar_com_et0 |
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et4 & ar_com_et4 |
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et5 & ar_com_et5 |
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et7 & ar_com_et7 |
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ar_cry_comp & ar_com_cont;
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wire ar_com_et0 = boole_2 | boole_4 |
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boole_12 | boole_13 | boole_15;
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wire ar_com_et4 = boole_4 | boole_10 | boole_11 | boole_14 |
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boole_15 | boole_16 | boole_17;
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wire ar_com_et5 = ir_acbm;
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wire ar_com_et7 = ir_acbm;
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wire ar_fm_mb0 = dct1 | lct0a |
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et1 & ar_fm_mb0_et1 |
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et6 & ar_fm_mb0_et6;
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wire ar_fm_mb0_et1 = boole_3 | boole_4 | boole_7 |
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boole_10 | boole_13 | acbm_set;
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wire ar_fm_mb0_et6 = iot_consz | iot_conso;
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wire ar_fm_mb1 = et1 & ar_fm_mb1_et1;
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wire ar_fm_mb1_et1 = boole_6 | boole_11 | boole_14 | acbm_com;
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wire ar_fm_mb_xor = et1 & ar_fm_mb_xor_et1;
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wire ar_fm_mb_xor_et1 = boole_14 | boole_6 | boole_11 | acbm_com;
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wire ar_fm_mb1 = et1 & ar_fm_mb1_et1;
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wire ar_fm_mbJ = cht1 | lct0 | mpt2 |
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et0a & ar_fm_mbJ_et0;
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wire ar_fm_mbJ_et0 = hwt_11 | fwt_00 | fwt_11 |
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memac_mem | iot_blk | iot_datao;
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wire ar_fm_mbltJ_et4 = hwt_lt | iot_cono;
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wire ar_fm_mbrtJ_et4 = hwt_rt;
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wire ar_incdec_t0;
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wire ar_negate_t0;
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@@ -1247,7 +1254,7 @@ module apr(
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.p(ar_cry_comp_D));
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wire [0:35] ar_mb_cry = mb & ~ar;
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wire [0:35] ar_cry_in = ar_cry_initiate ? { mb[1:35]&~ar[1:35], 1'b0 } :
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wire [-1:35] ar_cry_in = ar_cry_initiate ? { mb[0:35]&~ar[0:35], 1'b0 } :
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ar35_cry_in & ar17_cry_in ? 36'o000001000001 :
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ar35_cry_in ? 36'o000000000001 :
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ar17_cry_in ? 36'o000001000000 :
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@@ -1255,6 +1262,7 @@ module apr(
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// hold the cry out temporarily
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reg cry0, cry1;
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wire [0:35] ar_cry1_add = ar[1:35] + ar_cry_in[0:35];
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always @(posedge clk) begin: arctl
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integer i;
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@@ -1263,7 +1271,7 @@ module apr(
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if(arrt_clr)
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ar[18:35] <= 0;
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if(ar_cry_in) begin
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cry1 <= (ar[1:35] + ar_cry_in[1:35]) + 36'o0 >> 35;
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cry1 <= ar_cry1_add[0];
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{cry0, ar} <= ar + ar_cry_in;
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end
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if(arlt_com)
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@@ -1,8 +1,11 @@
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DEP=
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V=../clk.v ../memory.v ../arbiter.v ../memif.v ../membusif.v ../core161c.v \
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V=../clk.v ../memory.v ../arbiter.v ../memif.v ../membusif.v ../testcore161c.v ../core161c.v \
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../core164.v ../core32k.v ../fast162.v ../fast162_dp.v ../modules_50.v \
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../dly_50.v ../onchip_ram.v ../memory_16.v ../memory_16k.v ../memory_32k.v \
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../panel_6.v ../fakeapr.v ../ptr.v ../ptp.v
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../panel_6.v ../fakeapr.v ../apr.v ../ptr.v ../ptp.v
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tb_apr: tb_apr.v $(V) $(DEP)
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iverilog -o $@ tb_apr.v $(V)
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tb_ptp: tb_ptp.v $(V) $(DEP)
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iverilog -o $@ tb_ptp.v $(V)
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