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117 lines
3.2 KiB
Verilog
117 lines
3.2 KiB
Verilog
// AUTOGEN
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module iobus_3_connect(
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// unused
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input wire clk,
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input wire reset,
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// Master
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input wire m_iob_poweron,
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input wire m_iob_reset,
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input wire m_datao_clear,
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input wire m_datao_set,
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input wire m_cono_clear,
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input wire m_cono_set,
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input wire m_iob_fm_datai,
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input wire m_iob_fm_status,
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input wire m_rdi_pulse,
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input wire [3:9] m_ios,
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input wire [0:35] m_iob_write,
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output wire [1:7] m_pi_req,
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output wire [0:35] m_iob_read,
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output wire m_dr_split,
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output wire m_rdi_data,
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// Slave 0
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output wire s0_iob_poweron,
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output wire s0_iob_reset,
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output wire s0_datao_clear,
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output wire s0_datao_set,
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output wire s0_cono_clear,
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output wire s0_cono_set,
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output wire s0_iob_fm_datai,
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output wire s0_iob_fm_status,
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output wire s0_rdi_pulse,
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output wire [3:9] s0_ios,
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output wire [0:35] s0_iob_write,
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input wire [1:7] s0_pi_req,
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input wire [0:35] s0_iob_read,
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input wire s0_dr_split,
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input wire s0_rdi_data,
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// Slave 1
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output wire s1_iob_poweron,
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output wire s1_iob_reset,
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output wire s1_datao_clear,
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output wire s1_datao_set,
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output wire s1_cono_clear,
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output wire s1_cono_set,
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output wire s1_iob_fm_datai,
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output wire s1_iob_fm_status,
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output wire s1_rdi_pulse,
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output wire [3:9] s1_ios,
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output wire [0:35] s1_iob_write,
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input wire [1:7] s1_pi_req,
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input wire [0:35] s1_iob_read,
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input wire s1_dr_split,
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input wire s1_rdi_data,
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// Slave 2
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output wire s2_iob_poweron,
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output wire s2_iob_reset,
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output wire s2_datao_clear,
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output wire s2_datao_set,
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output wire s2_cono_clear,
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output wire s2_cono_set,
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output wire s2_iob_fm_datai,
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output wire s2_iob_fm_status,
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output wire s2_rdi_pulse,
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output wire [3:9] s2_ios,
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output wire [0:35] s2_iob_write,
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input wire [1:7] s2_pi_req,
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input wire [0:35] s2_iob_read,
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input wire s2_dr_split,
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input wire s2_rdi_data
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);
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assign m_pi_req = 0 | s0_pi_req | s1_pi_req | s2_pi_req;
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assign m_iob_read = m_iob_write | s0_iob_read | s1_iob_read | s2_iob_read;
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assign m_dr_split = 0 | s0_dr_split | s1_dr_split | s2_dr_split;
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assign m_rdi_data = 0 | s0_rdi_data | s1_rdi_data | s2_rdi_data;
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assign s0_iob_poweron = m_iob_poweron;
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assign s0_iob_reset = m_iob_reset;
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assign s0_datao_clear = m_datao_clear;
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assign s0_datao_set = m_datao_set;
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assign s0_cono_clear = m_cono_clear;
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assign s0_cono_set = m_cono_set;
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assign s0_iob_fm_datai = m_iob_fm_datai;
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assign s0_iob_fm_status = m_iob_fm_status;
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assign s0_rdi_pulse = m_rdi_pulse;
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assign s0_ios = m_ios;
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assign s0_iob_write = m_iob_write;
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assign s1_iob_poweron = m_iob_poweron;
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assign s1_iob_reset = m_iob_reset;
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assign s1_datao_clear = m_datao_clear;
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assign s1_datao_set = m_datao_set;
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assign s1_cono_clear = m_cono_clear;
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assign s1_cono_set = m_cono_set;
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assign s1_iob_fm_datai = m_iob_fm_datai;
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assign s1_iob_fm_status = m_iob_fm_status;
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assign s1_rdi_pulse = m_rdi_pulse;
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assign s1_ios = m_ios;
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assign s1_iob_write = m_iob_write;
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assign s2_iob_poweron = m_iob_poweron;
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assign s2_iob_reset = m_iob_reset;
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assign s2_datao_clear = m_datao_clear;
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assign s2_datao_set = m_datao_set;
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assign s2_cono_clear = m_cono_clear;
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assign s2_cono_set = m_cono_set;
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assign s2_iob_fm_datai = m_iob_fm_datai;
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assign s2_iob_fm_status = m_iob_fm_status;
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assign s2_rdi_pulse = m_rdi_pulse;
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assign s2_ios = m_ios;
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assign s2_iob_write = m_iob_write;
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endmodule
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